From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Avadhut Naik <avadhut.naik@amd.com>
Cc: linux-edac@vger.kernel.org, bp@alien8.de, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/5] EDAC/mc_sysfs: Increase legacy channel support to 16
Date: Wed, 10 Sep 2025 11:17:13 -0400 [thread overview]
Message-ID: <20250910151713.GG11602@yaz-khff2.amd.com> (raw)
In-Reply-To: <20250909185748.1621098-5-avadhut.naik@amd.com>
On Tue, Sep 09, 2025 at 06:53:13PM +0000, Avadhut Naik wrote:
> Newer AMD systems can support up to 16 channels per EDAC "mc" device.
> These are detected by the EDAC module running on the device, and the
> current EDAC interface is appropriately enumerated.
>
> The legacy EDAC sysfs interface however, provides device attributes for
> channels 0 through 11 only. Consequently, the last four channels, 12
> through 15, will not be enumerated and will not be visible through the
> legacy sysfs interface.
>
> Add additional device attributes to ensure that all 16 channels, if
> present, are enumerated by and visible through the legacy EDAC sysfs
> interface.
>
> Signed-off-by: Avadhut Naik <avadhut.naik@amd.com>
> ---
> Changes in v2:
> Patch introduced.
>
> Changes in v3:
> No changes.
> ---
> drivers/edac/edac_mc_sysfs.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
> index 0f338adf7d93..8689631f1905 100644
> --- a/drivers/edac/edac_mc_sysfs.c
> +++ b/drivers/edac/edac_mc_sysfs.c
> @@ -305,6 +305,14 @@ DEVICE_CHANNEL(ch10_dimm_label, S_IRUGO | S_IWUSR,
> channel_dimm_label_show, channel_dimm_label_store, 10);
> DEVICE_CHANNEL(ch11_dimm_label, S_IRUGO | S_IWUSR,
> channel_dimm_label_show, channel_dimm_label_store, 11);
> +DEVICE_CHANNEL(ch12_dimm_label, S_IRUGO | S_IWUSR,
> + channel_dimm_label_show, channel_dimm_label_store, 12);
> +DEVICE_CHANNEL(ch13_dimm_label, S_IRUGO | S_IWUSR,
> + channel_dimm_label_show, channel_dimm_label_store, 13);
> +DEVICE_CHANNEL(ch14_dimm_label, S_IRUGO | S_IWUSR,
> + channel_dimm_label_show, channel_dimm_label_store, 14);
> +DEVICE_CHANNEL(ch15_dimm_label, S_IRUGO | S_IWUSR,
> + channel_dimm_label_show, channel_dimm_label_store, 15);
>
> /* Total possible dynamic DIMM Label attribute file table */
> static struct attribute *dynamic_csrow_dimm_attr[] = {
> @@ -320,6 +328,10 @@ static struct attribute *dynamic_csrow_dimm_attr[] = {
> &dev_attr_legacy_ch9_dimm_label.attr.attr,
> &dev_attr_legacy_ch10_dimm_label.attr.attr,
> &dev_attr_legacy_ch11_dimm_label.attr.attr,
> + &dev_attr_legacy_ch12_dimm_label.attr.attr,
> + &dev_attr_legacy_ch13_dimm_label.attr.attr,
> + &dev_attr_legacy_ch14_dimm_label.attr.attr,
> + &dev_attr_legacy_ch15_dimm_label.attr.attr,
> NULL
> };
>
> @@ -348,6 +360,14 @@ DEVICE_CHANNEL(ch10_ce_count, S_IRUGO,
> channel_ce_count_show, NULL, 10);
> DEVICE_CHANNEL(ch11_ce_count, S_IRUGO,
> channel_ce_count_show, NULL, 11);
> +DEVICE_CHANNEL(ch12_ce_count, S_IRUGO,
> + channel_ce_count_show, NULL, 12);
> +DEVICE_CHANNEL(ch13_ce_count, S_IRUGO,
> + channel_ce_count_show, NULL, 13);
> +DEVICE_CHANNEL(ch14_ce_count, S_IRUGO,
> + channel_ce_count_show, NULL, 14);
> +DEVICE_CHANNEL(ch15_ce_count, S_IRUGO,
> + channel_ce_count_show, NULL, 15);
>
> /* Total possible dynamic ce_count attribute file table */
> static struct attribute *dynamic_csrow_ce_count_attr[] = {
> @@ -363,6 +383,10 @@ static struct attribute *dynamic_csrow_ce_count_attr[] = {
> &dev_attr_legacy_ch9_ce_count.attr.attr,
> &dev_attr_legacy_ch10_ce_count.attr.attr,
> &dev_attr_legacy_ch11_ce_count.attr.attr,
> + &dev_attr_legacy_ch12_ce_count.attr.attr,
> + &dev_attr_legacy_ch13_ce_count.attr.attr,
> + &dev_attr_legacy_ch14_ce_count.attr.attr,
> + &dev_attr_legacy_ch15_ce_count.attr.attr,
> NULL
> };
>
> --
There are many checkpatch warnings here.
Maybe it'd be prudent to note this in the commit message?
Something like "checkpatch warnings ignored to maintain coding style"
and maybe "affected lines are deprecated and will be removed", etc.?
Otherwise, I expect there will be some "checkpatch warning" fixes coming
our way.
Thanks,
Yazen
next prev parent reply other threads:[~2025-09-10 15:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-09 18:53 [PATCH v3 0/5] Cleanup and add support for AMD Family 1Ah-based SOCs Avadhut Naik
2025-09-09 18:53 ` [PATCH v3 1/5] EDAC/amd64: Generate ctl_name string at runtime Avadhut Naik
2025-09-10 14:51 ` Yazen Ghannam
2025-09-10 15:53 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 2/5] EDAC/amd64: Remove NUM_CONTROLLERS macro Avadhut Naik
2025-09-10 15:05 ` Yazen Ghannam
2025-09-10 15:48 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 3/5] EDAC/amd64: Add support for AMD family 1Ah-based newer models Avadhut Naik
2025-09-10 15:13 ` Yazen Ghannam
2025-09-10 16:08 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 4/5] EDAC/mc_sysfs: Increase legacy channel support to 16 Avadhut Naik
2025-09-10 15:17 ` Yazen Ghannam [this message]
2025-09-10 15:29 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 5/5] EDAC/mc_sysfs: Begin deprecating legacy sysfs EDAC interface Avadhut Naik
2025-09-10 15:24 ` Yazen Ghannam
2025-09-10 17:38 ` Naik, Avadhut
2025-09-15 17:04 ` Yazen Ghannam
2025-09-16 16:09 ` Naik, Avadhut
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