From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Ryan Roberts <ryan.roberts@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/6] arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK
Date: Mon, 3 Nov 2025 05:26:15 +0000 [thread overview]
Message-ID: <20251103052618.586763-4-anshuman.khandual@arm.com> (raw)
In-Reply-To: <20251103052618.586763-1-anshuman.khandual@arm.com>
TTBR_BADDR_MASK_52 discards bit[1] which is RES0, when TTBRx_EL1 register
contains 52 bits PA. Let's just keep the custom macro but redefine it via
tools sysreg register field format TTBRx_EL1_BADDR_MASK.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
arch/arm64/include/asm/pgtable-hwdef.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index f3b77deedfa2..e192c4dc624b 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -332,7 +332,7 @@
/*
* TTBR_ELx[1] is RES0 in this configuration.
*/
-#define TTBR_BADDR_MASK_52 GENMASK_ULL(47, 2)
+#define TTBR_BADDR_MASK_52 (TTBRx_EL1_BADDR_MASK & ~GENMASK(1, 1))
#endif
#ifdef CONFIG_ARM64_VA_BITS_52
--
2.30.2
next prev parent reply other threads:[~2025-11-03 5:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 5:26 [PATCH 0/6] arm64/mm: TTBRx_EL1 related changes Anshuman Khandual
2025-11-03 5:26 ` [PATCH 1/6] arm64/mm: Directly use TTBRx_EL1_ASID_MASK Anshuman Khandual
2025-11-03 5:26 ` [PATCH 2/6] arm64/mm: Directly use TTBRx_EL1_CnP Anshuman Khandual
2025-11-03 5:26 ` Anshuman Khandual [this message]
2025-11-03 5:26 ` [PATCH 4/6] arm64/mm: Ensure correct 48 bit PA gets into TTBRx_EL1 Anshuman Khandual
2025-11-04 15:17 ` Mark Rutland
2025-11-05 3:35 ` Anshuman Khandual
2025-11-03 5:26 ` [PATCH 5/6] arm64/mm: Describe 52 PA folding " Anshuman Khandual
2025-11-03 5:26 ` [PATCH 6/6] arm64/mm: Describe TTBR1_BADDR_4852_OFFSET Anshuman Khandual
2025-11-13 9:18 ` [PATCH 0/6] arm64/mm: TTBRx_EL1 related changes Anshuman Khandual
2025-11-14 9:55 ` Mark Rutland
2025-11-19 1:07 ` Anshuman Khandual
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