Re: [PATCH 5/7] tools/nolibc: handle 64-bit system call arguments on MIPS N32

[David Laight <david.laight.linux@gmail.com>]

On Sun, 19 Apr 2026 17:30:13 +0200
Willy Tarreau <w@1wt.eu> wrote:

> On Sat, Apr 18, 2026 at 01:54:55PM +0200, Thomas Weißschuh wrote:
> > Hey David,
> > 
> > Apr 18, 2026 13:14:46 David Laight <david.laight.linux@gmail.com>:
> >   
> > > On Sat, 18 Apr 2026 12:20:00 +0200
> > > Thomas Weißschuh <linux@weissschuh.net> wrote:
> > >  
> > >> The N32 system call ABI expects 64-bit values directly in registers.
> > >> This does not work on nolibc currently, as a 'long' is only 32 bits
> > >> wide. Switch the system call wrappers to use 'long long' instead which
> > >> can handle 64-bit values on N32. As on N64 'long' and 'long long' are
> > >> the same, this does not change the behavior there.
> > >>
> > >> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
> > >> ---
> > >> tools/include/nolibc/arch-mips.h | 94 +++++++++++++++++++++-------------------
> > >> 1 file changed, 49 insertions(+), 45 deletions(-)
> > >>
> > >> diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/arch-mips.h
> > >> index bb9d580ea1b1..557ef34d9df8 100644
> > >> --- a/tools/include/nolibc/arch-mips.h
> > >> +++ b/tools/include/nolibc/arch-mips.h
> > >> @@ -55,6 +55,8 @@
> > >> #define _NOLIBC_SYSCALL_STACK_RESERVE "addiu $sp, $sp, -32\n"
> > >> #define _NOLIBC_SYSCALL_STACK_UNRESERVE "addiu $sp, $sp, 32\n"
> > >>
> > >> +#define _NOLIBC_SYSCALL_REG register long
> > >> +
> > >> #else /* _ABIN32 || _ABI64 */
> > >>
> > >> /* binutils, GCC and clang disagree about register aliases, use numbers instead. */
> > >> @@ -66,12 +68,14 @@
> > >> #define _NOLIBC_SYSCALL_STACK_RESERVE
> > >> #define _NOLIBC_SYSCALL_STACK_UNRESERVE
> > >>
> > >> +#define _NOLIBC_SYSCALL_REG register long long
> > >> +
> > >> #endif /* _ABIO32 */  
> > >
> > > Since you need to use a #define, did you think about:
> > > #define _NOLIBC_SYSCALL_REG(var, reg) register long long var __asm__ (reg)
> > > to shorten the lines and the repetitive pattern.  
> > 
> > I didn't think of this.
> > Personally I am fine with both variants.
> > The parameterized macro is a bit weird
> > is it breaks the normal syntax.
> > Let's wait what Willy thinks.  
> 
> I don't have a strong preference either, however macros make debugging
> particularly painful and are only interesting when they save lots of
> complicated code, which is not the case here. So I'd say that Thomas'
> approach is minimalistic and obfuscates the least. If these were to be
> exposed to end users, I think David's proposals would be better, but
> since it's only for internal consumption and changed only once every
> 5 years, maybe better keep the explicit definitions like in Thomas'
> approach.

Fair enough, there probably aren't enough examples to make it worth while.

I would suggest using "+r" for the in-out registers; and [arg5] for the
ones that get pushed, reliably counting to 7 is hard :-)

Related to one of the other patches, I can't imagine how N32 getting
a 64bit value truncated would be a qemu bug.
Just seems wrong - isn't the cpu just running in 64bit mode ?
But I've not tried to look.
I've never used mips - never mind mips64, so I'm not doing to spot
anything subtle.
(I have used (and written - yes in VHDL [1]) the nios2; which is sort of
the same until you look closely.)

[1] Altera/Intel deprecated the nios2 (saying you could use riscv instead),
but it has slightly different instructions and they didn't publish the
actual supported instructions or timings.
Since some of 'our' code was clock-count critical I just re-implemented
the 'integer unit' (no mmu, no fp, no cache (or rather code+data only
from 'cache' with no backing memory), no interrupts).
Took a few weeks and I'm no vhdl expert.

	David

> 
> Willy