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From: Juergen Gross <jgross@suse.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: Juergen Gross <jgross@suse.com>,
	Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: [PATCH RFC 4/6] x86/msr: Rename the *_safe_regs[_on_cpu]() MSR functions
Date: Mon, 20 Apr 2026 11:16:32 +0200	[thread overview]
Message-ID: <20260420091634.128787-5-jgross@suse.com> (raw)
In-Reply-To: <20260420091634.128787-1-jgross@suse.com>

Move the functions rdmsr_safe_regs[_on_cpu]() and
wrmsr_safe_regs[_on_cpu]() into the "msr_" name space and change all
callers accordingly.

Signed-off-by: Juergen Gross <jgross@suse.com>
---
 arch/x86/include/asm/msr.h    | 17 ++++++++---------
 arch/x86/kernel/cpu/amd.c     |  4 ++--
 arch/x86/kernel/msr.c         |  4 ++--
 arch/x86/lib/msr-reg-export.c |  4 ++--
 arch/x86/lib/msr-reg.S        | 16 ++++++++--------
 arch/x86/lib/msr-smp.c        | 20 ++++++++++----------
 6 files changed, 32 insertions(+), 33 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 74e87b2b39fd..9b3d16b2eb61 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -156,9 +156,6 @@ static inline int notrace native_write_msr_safe(u32 msr, u64 val)
 	return err;
 }
 
-extern int rdmsr_safe_regs(u32 regs[8]);
-extern int wrmsr_safe_regs(u32 regs[8]);
-
 static inline u64 native_read_pmc(int counter)
 {
 	EAX_EDX_DECLARE_ARGS(val, low, high);
@@ -292,6 +289,8 @@ struct msr __percpu *msrs_alloc(void);
 void msrs_free(struct msr __percpu *msrs);
 int msr_set_bit(u32 msr, u8 bit);
 int msr_clear_bit(u32 msr, u8 bit);
+int msr_read_safe_regs(u32 regs[8]);
+int msr_write_safe_regs(u32 regs[8]);
 
 #ifdef CONFIG_SMP
 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
@@ -304,8 +303,8 @@ int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
 int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
-int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
-int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
+int msr_read_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
+int msr_write_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
 #else  /*  CONFIG_SMP  */
 static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
 {
@@ -354,13 +353,13 @@ static inline int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
 {
 	return wrmsrq_safe(msr_no, q);
 }
-static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
+static inline int msr_read_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
 {
-	return rdmsr_safe_regs(regs);
+	return msr_read_safe_regs(regs);
 }
-static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
+static inline int msr_write_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
 {
-	return wrmsr_safe_regs(regs);
+	return msr_write_safe_regs(regs);
 }
 #endif  /* CONFIG_SMP */
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 2d9ae6ab1701..7266fcfcf448 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -45,7 +45,7 @@ static inline int rdmsrq_amd_safe(unsigned msr, u64 *p)
 	gprs[1] = msr;
 	gprs[7] = 0x9c5a203a;
 
-	err = rdmsr_safe_regs(gprs);
+	err = msr_read_safe_regs(gprs);
 
 	*p = gprs[0] | ((u64)gprs[2] << 32);
 
@@ -64,7 +64,7 @@ static inline int wrmsrq_amd_safe(unsigned msr, u64 val)
 	gprs[2] = val >> 32;
 	gprs[7] = 0x9c5a203a;
 
-	return wrmsr_safe_regs(gprs);
+	return msr_write_safe_regs(gprs);
 }
 
 /*
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 43791746103c..e3e71e3ba59f 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -162,7 +162,7 @@ static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
 			err = -EFAULT;
 			break;
 		}
-		err = rdmsr_safe_regs_on_cpu(cpu, regs);
+		err = msr_read_safe_regs_on_cpu(cpu, regs);
 		if (err)
 			break;
 		if (copy_to_user(uregs, &regs, sizeof(regs)))
@@ -188,7 +188,7 @@ static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
 
 		add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
 
-		err = wrmsr_safe_regs_on_cpu(cpu, regs);
+		err = msr_write_safe_regs_on_cpu(cpu, regs);
 		if (err)
 			break;
 		if (copy_to_user(uregs, &regs, sizeof(regs)))
diff --git a/arch/x86/lib/msr-reg-export.c b/arch/x86/lib/msr-reg-export.c
index 876b4168ab0a..c3da46f0581b 100644
--- a/arch/x86/lib/msr-reg-export.c
+++ b/arch/x86/lib/msr-reg-export.c
@@ -2,5 +2,5 @@
 #include <linux/export.h>
 #include <asm/msr.h>
 
-EXPORT_SYMBOL(rdmsr_safe_regs);
-EXPORT_SYMBOL(wrmsr_safe_regs);
+EXPORT_SYMBOL(msr_read_safe_regs);
+EXPORT_SYMBOL(msr_write_safe_regs);
diff --git a/arch/x86/lib/msr-reg.S b/arch/x86/lib/msr-reg.S
index 5ef8494896e8..ccb9e3a962f4 100644
--- a/arch/x86/lib/msr-reg.S
+++ b/arch/x86/lib/msr-reg.S
@@ -12,8 +12,8 @@
  * reg layout: u32 gprs[eax, ecx, edx, ebx, esp, ebp, esi, edi]
  *
  */
-.macro op_safe_regs op
-SYM_TYPED_FUNC_START(\op\()_safe_regs)
+.macro op_safe_regs name op
+SYM_TYPED_FUNC_START(\name)
 	pushq %rbx
 	pushq %r12
 	movq	%rdi, %r10	/* Save pointer */
@@ -42,13 +42,13 @@ SYM_TYPED_FUNC_START(\op\()_safe_regs)
 	jmp     2b
 
 	_ASM_EXTABLE(1b, 3b)
-SYM_FUNC_END(\op\()_safe_regs)
+SYM_FUNC_END(\name)
 .endm
 
 #else /* X86_32 */
 
-.macro op_safe_regs op
-SYM_FUNC_START(\op\()_safe_regs)
+.macro op_safe_regs name op
+SYM_FUNC_START(\name)
 	pushl %ebx
 	pushl %ebp
 	pushl %esi
@@ -84,11 +84,11 @@ SYM_FUNC_START(\op\()_safe_regs)
 	jmp     2b
 
 	_ASM_EXTABLE(1b, 3b)
-SYM_FUNC_END(\op\()_safe_regs)
+SYM_FUNC_END(\name)
 .endm
 
 #endif
 
-op_safe_regs rdmsr
-op_safe_regs wrmsr
+op_safe_regs msr_read_safe_regs rdmsr
+op_safe_regs msr_write_safe_regs wrmsr
 
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index b8f63419e6ae..21bb1aee2af7 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -236,42 +236,42 @@ EXPORT_SYMBOL(rdmsrq_safe_on_cpu);
  * These variants are significantly slower, but allows control over
  * the entire 32-bit GPR set.
  */
-static void __rdmsr_safe_regs_on_cpu(void *info)
+static void __msr_read_safe_regs(void *info)
 {
 	struct msr_regs_info *rv = info;
 
-	rv->err = rdmsr_safe_regs(rv->regs);
+	rv->err = msr_read_safe_regs(rv->regs);
 }
 
-static void __wrmsr_safe_regs_on_cpu(void *info)
+static void __msr_write_safe_regs(void *info)
 {
 	struct msr_regs_info *rv = info;
 
-	rv->err = wrmsr_safe_regs(rv->regs);
+	rv->err = msr_write_safe_regs(rv->regs);
 }
 
-int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
+int msr_read_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
 {
 	int err;
 	struct msr_regs_info rv;
 
 	rv.regs   = regs;
 	rv.err    = -EIO;
-	err = smp_call_function_single(cpu, __rdmsr_safe_regs_on_cpu, &rv, 1);
+	err = smp_call_function_single(cpu, __msr_read_safe_regs, &rv, 1);
 
 	return err ? err : rv.err;
 }
-EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu);
+EXPORT_SYMBOL(msr_read_safe_regs_on_cpu);
 
-int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
+int msr_write_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
 {
 	int err;
 	struct msr_regs_info rv;
 
 	rv.regs = regs;
 	rv.err  = -EIO;
-	err = smp_call_function_single(cpu, __wrmsr_safe_regs_on_cpu, &rv, 1);
+	err = smp_call_function_single(cpu, __msr_write_safe_regs, &rv, 1);
 
 	return err ? err : rv.err;
 }
-EXPORT_SYMBOL(wrmsr_safe_regs_on_cpu);
+EXPORT_SYMBOL(msr_write_safe_regs_on_cpu);
-- 
2.53.0


  parent reply	other threads:[~2026-04-20  9:17 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-20  9:16 [PATCH RFC 0/6] x86/msr: Rename MSR access functions Juergen Gross
2026-04-20  9:16 ` [PATCH RFC 1/6] x86/msr: Rename msr_read() and msr_write() Juergen Gross
2026-04-20  9:16 ` [PATCH RFC 2/6] x86/msr: Create a new minimal set of local MSR access functions Juergen Gross
2026-04-20  9:16 ` [PATCH RFC 3/6] x86/msr: Create a new minimal set of inter-CPU " Juergen Gross
2026-04-20  9:16 ` Juergen Gross [this message]
2026-04-20  9:16 ` [PATCH RFC 5/6] x86/events: Switch core parts to use new " Juergen Gross
2026-04-20  9:16 ` [PATCH RFC 6/6] x86/cpu/mce: Switch code " Juergen Gross
2026-04-20 11:35 ` [PATCH RFC 0/6] x86/msr: Rename " Peter Zijlstra
2026-04-20 11:41   ` Peter Zijlstra
2026-04-20 11:51     ` Jürgen Groß
2026-04-20 13:44       ` Sean Christopherson
2026-04-20 14:04         ` Jürgen Groß
2026-04-20 15:34           ` H. Peter Anvin
2026-04-20 11:49   ` Jürgen Groß
2026-04-20 12:33     ` Peter Zijlstra
2026-04-20 13:01       ` Jürgen Groß
2026-04-20 13:10         ` Peter Zijlstra
2026-04-20 13:23           ` Jürgen Groß
2026-04-20 13:36           ` Sean Christopherson
2026-04-20 13:57             ` Jürgen Groß

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