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* [PATCH v2 0/2] pwm: spacemit: Add Support for K3 SoC
@ 2026-04-28 10:46 Yixun Lan
  2026-04-28 10:46 ` [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support Yixun Lan
  2026-04-28 10:46 ` [PATCH v2 2/2] pwm: pxa: Add optional bus clock Yixun Lan
  0 siblings, 2 replies; 4+ messages in thread
From: Yixun Lan @ 2026-04-28 10:46 UTC (permalink / raw)
  To: Uwe Kleine-König, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Duje Mihanović
  Cc: linux-pwm, devicetree, linux-kernel, linux-riscv, spacemit,
	Yixun Lan

The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1
generation, while the difference is that one additional bus clock is
added. Introduce a new compatible string and also adjust driver code to
support it.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
Changes in v2:
- Merge dt-binding of clock-names property
- Use local variable for bus clock
- Rebase to v7.1-rc1
- Link to v1: https://lore.kernel.org/r/20260409-03-k3-pwm-drv-v1-0-1307a06fba38@kernel.org

---
Yixun Lan (2):
      dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support
      pwm: pxa: Add optional bus clock

 .../devicetree/bindings/pwm/marvell,pxa-pwm.yaml   | 41 ++++++++++++++++++++--
 drivers/pwm/pwm-pxa.c                              |  8 ++++-
 2 files changed, 45 insertions(+), 4 deletions(-)
---
base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731
change-id: 20260401-03-k3-pwm-drv-4ea99ae355d6

Best regards,
-- 
Yixun Lan <dlan@kernel.org>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support
  2026-04-28 10:46 [PATCH v2 0/2] pwm: spacemit: Add Support for K3 SoC Yixun Lan
@ 2026-04-28 10:46 ` Yixun Lan
  2026-04-28 18:12   ` Conor Dooley
  2026-04-28 10:46 ` [PATCH v2 2/2] pwm: pxa: Add optional bus clock Yixun Lan
  1 sibling, 1 reply; 4+ messages in thread
From: Yixun Lan @ 2026-04-28 10:46 UTC (permalink / raw)
  To: Uwe Kleine-König, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Duje Mihanović
  Cc: linux-pwm, devicetree, linux-kernel, linux-riscv, spacemit,
	Yixun Lan

The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1
generation, while the difference is that one additional bus clock is
added.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 .../devicetree/bindings/pwm/marvell,pxa-pwm.yaml   | 41 ++++++++++++++++++++--
 1 file changed, 38 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml
index 8df327e52810..f1422a401b6b 100644
--- a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml
@@ -15,7 +15,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: spacemit,k1-pwm
+            enum:
+              - spacemit,k1-pwm
+              - spacemit,k3-pwm
     then:
       properties:
         "#pwm-cells":
@@ -26,6 +28,26 @@ allOf:
           const: 1
           description: |
             Used for specifying the period length in nanoseconds.
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - spacemit,k3-pwm
+    then:
+      required:
+        - clock-names
+      properties:
+        clocks:
+          minItems: 2
+        clock-names:
+          minItems: 2
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names:
+          maxItems: 1
 
 properties:
   compatible:
@@ -36,7 +58,9 @@ properties:
           - marvell,pxa168-pwm
           - marvell,pxa910-pwm
       - items:
-          - const: spacemit,k1-pwm
+          - enum:
+              - spacemit,k1-pwm
+              - spacemit,k3-pwm
           - const: marvell,pxa910-pwm
 
   reg:
@@ -47,7 +71,18 @@ properties:
     description: Number of cells in a pwm specifier.
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: The function clock
+      - description: An optional bus clock
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
+    oneOf:
+      - items:
+          - const: func
+          - const: bus
 
   resets:
     maxItems: 1

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v2 2/2] pwm: pxa: Add optional bus clock
  2026-04-28 10:46 [PATCH v2 0/2] pwm: spacemit: Add Support for K3 SoC Yixun Lan
  2026-04-28 10:46 ` [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support Yixun Lan
@ 2026-04-28 10:46 ` Yixun Lan
  1 sibling, 0 replies; 4+ messages in thread
From: Yixun Lan @ 2026-04-28 10:46 UTC (permalink / raw)
  To: Uwe Kleine-König, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Duje Mihanović
  Cc: linux-pwm, devicetree, linux-kernel, linux-riscv, spacemit,
	Yixun Lan

Add one secondary optional bus clock for the PWM PXA driver, also keep it
compatible with old single clock.

The SpacemiT K3 SoC require a bus clock for PWM controller, acquire and
enable it during probe phase.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 drivers/pwm/pwm-pxa.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c
index 0f5bdb0e395e..80d2fa10919f 100644
--- a/drivers/pwm/pwm-pxa.c
+++ b/drivers/pwm/pwm-pxa.c
@@ -161,6 +161,7 @@ static int pwm_probe(struct platform_device *pdev)
 	const struct platform_device_id *id = platform_get_device_id(pdev);
 	struct pwm_chip *chip;
 	struct pxa_pwm_chip *pc;
+	struct clk *bus_clk;
 	struct device *dev = &pdev->dev;
 	struct reset_control *rst;
 	int ret = 0;
@@ -177,7 +178,12 @@ static int pwm_probe(struct platform_device *pdev)
 		return PTR_ERR(chip);
 	pc = to_pxa_pwm_chip(chip);
 
-	pc->clk = devm_clk_get(dev, NULL);
+	bus_clk = devm_clk_get_optional_enabled(dev, "bus");
+	if (IS_ERR(bus_clk))
+		return dev_err_probe(dev, PTR_ERR(bus_clk), "Failed to get bus clock\n");
+
+	/* Get named func clk if bus clock is valid */
+	pc->clk = devm_clk_get(dev, bus_clk ? "func" : NULL);
 	if (IS_ERR(pc->clk))
 		return dev_err_probe(dev, PTR_ERR(pc->clk), "Failed to get clock\n");
 

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support
  2026-04-28 10:46 ` [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support Yixun Lan
@ 2026-04-28 18:12   ` Conor Dooley
  0 siblings, 0 replies; 4+ messages in thread
From: Conor Dooley @ 2026-04-28 18:12 UTC (permalink / raw)
  To: Yixun Lan
  Cc: Uwe Kleine-König, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Duje Mihanović, linux-pwm, devicetree,
	linux-kernel, linux-riscv, spacemit

[-- Attachment #1: Type: text/plain, Size: 345 bytes --]

On Tue, Apr 28, 2026 at 10:46:50AM +0000, Yixun Lan wrote:
> The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1
> generation, while the difference is that one additional bus clock is
> added.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-04-28 18:13 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-28 10:46 [PATCH v2 0/2] pwm: spacemit: Add Support for K3 SoC Yixun Lan
2026-04-28 10:46 ` [PATCH v2 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support Yixun Lan
2026-04-28 18:12   ` Conor Dooley
2026-04-28 10:46 ` [PATCH v2 2/2] pwm: pxa: Add optional bus clock Yixun Lan

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