* [PATCH] ARM: dts: ixp4xx: use phandle-based GPIOs in mi424wr
@ 2026-04-28 19:10 Mohamed Ayman
2026-05-05 9:36 ` Linus Walleij
0 siblings, 1 reply; 2+ messages in thread
From: Mohamed Ayman @ 2026-04-28 19:10 UTC (permalink / raw)
To: Linus Walleij, Imre Kaloz, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, moderated list:ARM/INTEL IXP4XX ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Cc: Mohamed Ayman, moderated list:ARM/INTEL IXP4XX ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Convert remaining legacy integer GPIO specifiers to phandle-based
descriptors in intel-ixp42x-actiontec-mi424wr.dtsi.
All other GPIOs in this file already use &gpio0/&gpio1. These are the
last remaining legacy users in the IXP4xx DTS files.
Signed-off-by: Mohamed Ayman <mohamedaymanworkspace@gmail.com>
---
.../boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
index 9b54e3c01a34..3043ae7232dd 100644
--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
+++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
@@ -195,19 +195,19 @@ gpio1: gpio@1,0 {
pci-reset-hog {
gpio-hog;
- gpios = <7 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCI reset";
};
pstn-relay-hog-1 {
gpio-hog;
- gpios = <11 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "PSTN relay control 1";
};
pstn-relay-hog-2 {
gpio-hog;
- gpios = <12 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "PSTN relay control 2";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] ARM: dts: ixp4xx: use phandle-based GPIOs in mi424wr
2026-04-28 19:10 [PATCH] ARM: dts: ixp4xx: use phandle-based GPIOs in mi424wr Mohamed Ayman
@ 2026-05-05 9:36 ` Linus Walleij
0 siblings, 0 replies; 2+ messages in thread
From: Linus Walleij @ 2026-05-05 9:36 UTC (permalink / raw)
To: Mohamed Ayman
Cc: Imre Kaloz, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
moderated list:ARM/INTEL IXP4XX ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Tue, Apr 28, 2026 at 9:10 PM Mohamed Ayman
<mohamedaymanworkspace@gmail.com> wrote:
> Convert remaining legacy integer GPIO specifiers to phandle-based
> descriptors in intel-ixp42x-actiontec-mi424wr.dtsi.
>
> All other GPIOs in this file already use &gpio0/&gpio1. These are the
> last remaining legacy users in the IXP4xx DTS files.
>
> Signed-off-by: Mohamed Ayman <mohamedaymanworkspace@gmail.com>
I signed this off and sent to the SoC maintainers for application.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-05-05 9:36 ` Linus Walleij
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