From: Dominique Belhachemi <domibel@debian.org>
To: Conor Dooley <conor@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>
Cc: Emil Renner Berthing <kernel@esmil.dk>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] cache: sifive_ccache: Add StarFive JH7110 SoC support
Date: Thu, 30 Apr 2026 03:52:59 +0000 [thread overview]
Message-ID: <20260430035259.3402954-1-domibel@debian.org> (raw)
This cache controller is also used on the StarFive JH7110 SoC. It does
not have the data-uncorrectable ECC quirk that JH7100 has, so only
QUIRK_NONSTANDARD_CACHE_OPS is set.
Signed-off-by: Dominique Belhachemi <domibel@debian.org>
---
drivers/cache/sifive_ccache.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c
index a86800b123b9..2acb8bdf06d5 100644
--- a/drivers/cache/sifive_ccache.c
+++ b/drivers/cache/sifive_ccache.c
@@ -124,6 +124,8 @@ static const struct of_device_id sifive_ccache_ids[] = {
{ .compatible = "sifive,fu740-c000-ccache" },
{ .compatible = "starfive,jh7100-ccache",
.data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS | QUIRK_BROKEN_DATA_UNCORR) },
+ { .compatible = "starfive,jh7110-ccache",
+ .data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS) },
{ .compatible = "sifive,ccache0" },
{ /* end of table */ }
};
--
2.53.0
next reply other threads:[~2026-04-30 3:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-30 3:52 Dominique Belhachemi [this message]
2026-04-30 19:13 ` [PATCH] cache: sifive_ccache: Add StarFive JH7110 SoC support Conor Dooley
2026-04-30 23:39 ` Dominique Belhachemi
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