Re: [PATCH] cache: sifive_ccache: Add StarFive JH7110 SoC support

[Conor Dooley <conor@kernel.org>]

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On Thu, Apr 30, 2026 at 03:52:59AM +0000, Dominique Belhachemi wrote:
> This cache controller is also used on the StarFive JH7110 SoC. It does
> not have the data-uncorrectable ECC quirk that JH7100 has, so only
> QUIRK_NONSTANDARD_CACHE_OPS is set.

What's the motivation for enabling the nonstandard cache ops here?
The driver already binds with the generic sifive compatible on this
platform, and there's no peripherals currently supported on this
platform that need non-coherent DMA.

> 
> Signed-off-by: Dominique Belhachemi <domibel@debian.org>
> ---
>  drivers/cache/sifive_ccache.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c
> index a86800b123b9..2acb8bdf06d5 100644
> --- a/drivers/cache/sifive_ccache.c
> +++ b/drivers/cache/sifive_ccache.c
> @@ -124,6 +124,8 @@ static const struct of_device_id sifive_ccache_ids[] = {
>  	{ .compatible = "sifive,fu740-c000-ccache" },
>  	{ .compatible = "starfive,jh7100-ccache",
>  	  .data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS | QUIRK_BROKEN_DATA_UNCORR) },
> +	{ .compatible = "starfive,jh7110-ccache",
> +	  .data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS) },
>  	{ .compatible = "sifive,ccache0" },
>  	{ /* end of table */ }
>  };
> -- 
> 2.53.0
> 

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