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From: Conor Dooley <conor@kernel.org>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: Pramod Maurya <pramod.nexgen@gmail.com>,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	jacobsfeder@gmail.com, devicetree@vger.kernel.org,
	linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] dt-bindings: misc: Add binding for Xilinx AXI-Stream FIFO
Date: Mon, 11 May 2026 17:18:41 +0100	[thread overview]
Message-ID: <20260511-countless-babied-4177a86549ed@spud> (raw)
In-Reply-To: <2026051050-marathon-fragrant-edbf@gregkh>

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On Sun, May 10, 2026 at 06:07:01PM +0200, Greg KH wrote:
> On Sun, May 10, 2026 at 04:44:57AM -0400, Pramod Maurya wrote:
> > Add a YAML schema for the Xilinx AXI-Stream FIFO IP core (PG080).
> > The binding documents the three supported compatible strings and all
> > vendor-specific properties that the axis-fifo driver reads from the
> > device tree.
> > 
> > This resolves the following checkpatch.pl warnings in
> > drivers/staging/axis-fifo/axis-fifo.c:
> >   WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.1" appears un-documented
> >   WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.2" appears un-documented
> >   WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.3" appears un-documented
> > 
> > Signed-off-by: Pramod Maurya <pramod.nexgen@gmail.com>
> > ---
> > Changes in v2:
> > - Delete drivers/staging/axis-fifo/axis-fifo.txt as part of the
> >   conversion (was missing from v1)
> > - Add all Vivado-generated properties to the schema so that real
> >   hardware DT nodes pass validation with additionalProperties: false
> > - Update example to match a realistic Vivado-generated DT node
> >   including all properties
> > 
> >  .../bindings/misc/xlnx,axi-fifo-mm-s.yaml     | 265 ++++++++++++++++++
> >  MAINTAINERS                                   |   6 +
> >  drivers/staging/axis-fifo/axis-fifo.txt       |  96 -------
> >  3 files changed, 271 insertions(+), 96 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
> 
> No, staging drivers need to be self-contained.  When/if the axis-fifo
> driver moves out of drivers/staging/ this can happen, but not until
> then.
> 
> You can convert this to yaml in-place if you want, AND you can test that
> the conversion is correct.  Do you have this hardware to test this with?

Copy-pasting from v1...
| Someone else submitted this conversion (which it is, despite you not
| removing the old file), and the commentary I provided for that patch
| applies here too:
| https://lore.kernel.org/all/20260227-unboxed-customary-7ce6eda1858c@spud/

I suspect that this could be a dma-engine and any patch doing a
conversion needs to justify why it is not.
pw-bot: changes-requested

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      reply	other threads:[~2026-05-11 16:18 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-10  8:44 [PATCH v2] dt-bindings: misc: Add binding for Xilinx AXI-Stream FIFO Pramod Maurya
2026-05-10 16:07 ` Greg KH
2026-05-11 16:18   ` Conor Dooley [this message]

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