From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v2 09/12] reset: starfive: Introduce assert_polarity
Date: Tue, 12 May 2026 01:35:18 -0700 [thread overview]
Message-ID: <20260512083521.3448-10-changhuang.liang@starfivetech.com> (raw)
In-Reply-To: <20260512083521.3448-1-changhuang.liang@starfivetech.com>
The JHB100 SoC supports inverted operations for reset
assertion/deassertion, introducing the an assert_polarity field to
distinguish between different operation logics.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
drivers/reset/starfive/reset-starfive-common.c | 18 +++++++++++++++---
drivers/reset/starfive/reset-starfive-common.h | 6 ++++++
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/reset/starfive/reset-starfive-common.c b/drivers/reset/starfive/reset-starfive-common.c
index 8ea142ecbd15..c7289c2b2a28 100644
--- a/drivers/reset/starfive/reset-starfive-common.c
+++ b/drivers/reset/starfive/reset-starfive-common.c
@@ -68,7 +68,7 @@ static int starfive_reset_update(struct reset_controller_dev *rcdev,
reg_status = data->status + offset * sizeof(u32);
done = data->asserted ? data->asserted[offset] & mask : 0;
- if (!assert)
+ if (data->info && data->info->assert_polarity == assert)
done ^= mask;
spin_lock_irqsave(&data->lock, flags);
@@ -90,13 +90,25 @@ static int starfive_reset_update(struct reset_controller_dev *rcdev,
static int starfive_reset_assert(struct reset_controller_dev *rcdev,
unsigned long id)
{
- return starfive_reset_update(rcdev, id, true);
+ struct starfive_reset *data = starfive_reset_from(rcdev);
+ bool assert = true;
+
+ if (data->info && data->info->assert_polarity)
+ assert = false;
+
+ return starfive_reset_update(rcdev, id, assert);
}
static int starfive_reset_deassert(struct reset_controller_dev *rcdev,
unsigned long id)
{
- return starfive_reset_update(rcdev, id, false);
+ struct starfive_reset *data = starfive_reset_from(rcdev);
+ bool deassert = false;
+
+ if (data->info && data->info->assert_polarity)
+ deassert = true;
+
+ return starfive_reset_update(rcdev, id, deassert);
}
static int starfive_reset_reset(struct reset_controller_dev *rcdev,
diff --git a/drivers/reset/starfive/reset-starfive-common.h b/drivers/reset/starfive/reset-starfive-common.h
index ee457d9b90a3..d4017b8069fc 100644
--- a/drivers/reset/starfive/reset-starfive-common.h
+++ b/drivers/reset/starfive/reset-starfive-common.h
@@ -15,6 +15,12 @@ struct starfive_reset_info {
unsigned int nr_resets;
unsigned int assert_offset;
unsigned int status_offset;
+
+ /* If assert_polarity is false, setting the bit to 1 asserts
+ * the signal while clearing it to 0 deasserts it, and vice
+ * versa.
+ */
+ bool assert_polarity;
bool discontigous;
struct starfive_reset_map *map;
};
--
2.25.1
next prev parent reply other threads:[~2026-05-12 8:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 8:35 [PATCH v2 00/12] Add StarFive JHB100 syscon modules Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 01/12] dt-bindings: soc: starfive: " Changhuang Liang
2026-05-12 17:38 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 02/12] dt-bindings: clock: Add system-0 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 03/12] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 04/12] dt-bindings: clock: Add peripheral-0 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 05/12] clk: starfive: Add peripheral-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 06/12] dt-bindings: clock: Add peripheral-1 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 07/12] clk: starfive: Add Peripheral-1 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 08/12] dt-bindings: reset: Add StarFive JHB100 reset generator Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang [this message]
2026-05-12 8:35 ` [PATCH v2 10/12] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 11/12] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-05-12 17:45 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 12/12] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-05-12 17:40 ` [PATCH v2 00/12] Add StarFive JHB100 syscon modules Conor Dooley
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