* [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config
@ 2026-05-19 16:40 Han Gao
2026-05-19 23:21 ` Yixun Lan
2026-05-20 6:19 ` Troy Mitchell
0 siblings, 2 replies; 3+ messages in thread
From: Han Gao @ 2026-05-19 16:40 UTC (permalink / raw)
To: Linus Walleij, Yixun Lan, Hendrik Hamerlinck, Han Gao, Anand Moon,
Junhui Liu, Troy Mitchell
Cc: linux-gpio, linux-riscv, spacemit, linux-kernel, Han Gao
spacemit_pin_set_config() looks up the per-pin descriptor with
spacemit_get_pin() then checks the wrong variable for failure:
const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin);
...
if (!pin)
return -EINVAL;
reg = spacemit_pin_to_reg(pctrl, spin->pin);
pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a
valid pin, so rejecting it here drops the PAD config write for the first
pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as
its first entry, so its drive-strength / bias configuration was silently
ignored.
The intended guard is against spacemit_get_pin() returning NULL when the
pin id isn't in the SoC's pin table. Check spin instead, which both
restores PAD setup for pin 0 and prevents a NULL deref on spin->pin.
Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
---
drivers/pinctrl/spacemit/pinctrl-k1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/spacemit/pinctrl-k1.c b/drivers/pinctrl/spacemit/pinctrl-k1.c
index b0be62b1c816..95024e2bb5a5 100644
--- a/drivers/pinctrl/spacemit/pinctrl-k1.c
+++ b/drivers/pinctrl/spacemit/pinctrl-k1.c
@@ -795,7 +795,7 @@ static int spacemit_pin_set_config(struct spacemit_pinctrl *pctrl,
void __iomem *reg;
unsigned int mux;
- if (!pin)
+ if (!spin)
return -EINVAL;
reg = spacemit_pin_to_reg(pctrl, spin->pin);
--
2.47.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config
2026-05-19 16:40 [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config Han Gao
@ 2026-05-19 23:21 ` Yixun Lan
2026-05-20 6:19 ` Troy Mitchell
1 sibling, 0 replies; 3+ messages in thread
From: Yixun Lan @ 2026-05-19 23:21 UTC (permalink / raw)
To: Linus Walleij, Han Gao
Cc: Hendrik Hamerlinck, Anand Moon, Junhui Liu, Troy Mitchell,
linux-gpio, linux-riscv, spacemit, linux-kernel, Han Gao
Hi Linus,
Can you take this as a fix for v7.1 cycle?
On 00:40 Wed 20 May , Han Gao wrote:
> spacemit_pin_set_config() looks up the per-pin descriptor with
> spacemit_get_pin() then checks the wrong variable for failure:
>
> const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin);
> ...
> if (!pin)
> return -EINVAL;
>
> reg = spacemit_pin_to_reg(pctrl, spin->pin);
>
> pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a
> valid pin, so rejecting it here drops the PAD config write for the first
> pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as
> its first entry, so its drive-strength / bias configuration was silently
> ignored.
>
> The intended guard is against spacemit_get_pin() returning NULL when the
> pin id isn't in the SoC's pin table. Check spin instead, which both
> restores PAD setup for pin 0 and prevents a NULL deref on spin->pin.
>
> Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
LGTM, thanks
Reviewed-by: Yixun Lan <dlan@kernel.org>
> ---
> drivers/pinctrl/spacemit/pinctrl-k1.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/spacemit/pinctrl-k1.c b/drivers/pinctrl/spacemit/pinctrl-k1.c
> index b0be62b1c816..95024e2bb5a5 100644
> --- a/drivers/pinctrl/spacemit/pinctrl-k1.c
> +++ b/drivers/pinctrl/spacemit/pinctrl-k1.c
> @@ -795,7 +795,7 @@ static int spacemit_pin_set_config(struct spacemit_pinctrl *pctrl,
> void __iomem *reg;
> unsigned int mux;
>
> - if (!pin)
> + if (!spin)
> return -EINVAL;
>
> reg = spacemit_pin_to_reg(pctrl, spin->pin);
> --
> 2.47.3
>
--
Yixun Lan (dlan)
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config
2026-05-19 16:40 [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config Han Gao
2026-05-19 23:21 ` Yixun Lan
@ 2026-05-20 6:19 ` Troy Mitchell
1 sibling, 0 replies; 3+ messages in thread
From: Troy Mitchell @ 2026-05-20 6:19 UTC (permalink / raw)
To: Han Gao, Linus Walleij, Yixun Lan, Hendrik Hamerlinck, Anand Moon,
Junhui Liu, Troy Mitchell
Cc: linux-gpio, linux-riscv, spacemit, linux-kernel, Han Gao
On Wed May 20, 2026 at 12:40 AM CST, Han Gao wrote:
> spacemit_pin_set_config() looks up the per-pin descriptor with
> spacemit_get_pin() then checks the wrong variable for failure:
>
> const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin);
> ...
> if (!pin)
> return -EINVAL;
>
> reg = spacemit_pin_to_reg(pctrl, spin->pin);
>
> pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a
> valid pin, so rejecting it here drops the PAD config write for the first
> pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as
> its first entry, so its drive-strength / bias configuration was silently
> ignored.
>
> The intended guard is against spacemit_get_pin() returning NULL when the
> pin id isn't in the SoC's pin table. Check spin instead, which both
> restores PAD setup for pin 0 and prevents a NULL deref on spin->pin.
>
> Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Thanks.
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-05-20 6:20 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-19 16:40 [PATCH] pinctrl: spacemit: fix NULL check in spacemit_pin_set_config Han Gao
2026-05-19 23:21 ` Yixun Lan
2026-05-20 6:19 ` Troy Mitchell
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox