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From: Bastien Curutchet <bastien.curutchet@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	 Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	 Michal Simek <michal.simek@amd.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	 linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	 Bastien Curutchet <bastien.curutchet@bootlin.com>
Subject: [PATCH 3/4] rawnand: base: Export nand_read_page_swecc
Date: Thu, 23 Jul 2026 15:41:03 +0200	[thread overview]
Message-ID: <20260723-mix-ecc-v1-3-7361c3baeb07@bootlin.com> (raw)
In-Reply-To: <20260723-mix-ecc-v1-0-7361c3baeb07@bootlin.com>

nand_read_page_swecc() isn't exported while it could be used from the
drivers for the mixed case where ECC writes are done by the hardware and
ECC reads are done by software.

Export nand_read_page_swecc() to make it usable by drivers.

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
---
 drivers/mtd/nand/raw/nand_base.c             | 5 +++--
 drivers/mtd/nand/raw/pl35x-nand-controller.c | 1 +
 include/linux/mtd/rawnand.h                  | 2 ++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c04c3e74f661..950c079aa27b 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -2941,8 +2941,8 @@ static int nand_read_page_raw_syndrome(struct nand_chip *chip, uint8_t *buf,
  * @oob_required: caller requires OOB data read to chip->oob_poi
  * @page: page number to read
  */
-static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
-				int oob_required, int page)
+int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
+			 int oob_required, int page)
 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	int i, eccsize = chip->ecc.size, ret;
@@ -2979,6 +2979,7 @@ static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
 	}
 	return max_bitflips;
 }
+EXPORT_SYMBOL_GPL(nand_read_page_swecc);
 
 /**
  * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index bd89aaadd1b2..d61eba938311 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -21,6 +21,7 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/nand-ecc-sw-hamming.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/of.h>
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 3658315752bf..5539e96b2cac 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1578,6 +1578,8 @@ int nand_write_data_op(struct nand_chip *chip, const void *buf,
 		       unsigned int len, bool force_8bit);
 int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf,
 				   int oob_required, int page);
+int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
+			 int oob_required, int page);
 
 /* Scan and identify a NAND device */
 int nand_scan_with_ids(struct nand_chip *chip, unsigned int max_chips,

-- 
2.55.0


  parent reply	other threads:[~2026-07-23 13:41 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-23 13:41 [PATCH 0/4] rawnand: pl35x: Implement mixed ECC Bastien Curutchet
2026-07-23 13:41 ` [PATCH 1/4] nand: hamming: Replace sm_order boolean with enum Bastien Curutchet
2026-07-23 13:41 ` [PATCH 2/4] nand: hamming: Add support for the PL35x ECC bit ordering Bastien Curutchet
2026-07-23 13:41 ` Bastien Curutchet [this message]
2026-07-23 13:41 ` [PATCH 4/4] rawnand: pl35x: Implement mixed ECC computing Bastien Curutchet
2026-08-07 14:01 ` [PATCH 0/4] rawnand: pl35x: Implement mixed ECC Miquel Raynal

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