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From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
	<joro@8bytes.org>, <jgg@nvidia.com>
Cc: <yi.l.liu@intel.com>, <kevin.tian@intel.com>,
	<nicolinc@nvidia.com>, <vasant.hegde@amd.com>,
	<jon.grimm@amd.com>, <santosh.shukla@amd.com>, <Sairaj.K@amd.com>,
	<jay.chen@amd.com>, <wvw@google.com>, <wnliu@google.com>,
	<dantuluris@google.com>, <chriscli@google.com>,
	<kpsingh@google.com>, <alejandro.j.jimenez@oracle.com>,
	<joao.m.martins@oracle.com>,
	"Suravee Suthikulpanit" <suravee.suthikulpanit@amd.com>
Subject: [PATCH 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases
Date: Mon, 27 Jul 2026 13:29:09 +0000	[thread overview]
Message-ID: <20260727132913.22475-21-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20260727132913.22475-1-suravee.suthikulpanit@amd.com>

The per-segment translate-device-id pool tracks which device-table
indices are reserved for real PCI functions versus available for
dynamic allocation to vIOMMU translation DTEs.
amd_iommu_attach_device() already calls amd_iommu_trans_devid_reserve()
for the struct device's own PCI BDF so that id cannot later be returned
by the allocator.

That is not sufficient on its own.  The AMD IOMMU driver programs
identical DMA translation device-table entries (DTEs) for every
requestor ID that can issue DMA on behalf of the same PCI function: the
IVRS alias from alias_table[] when it is not covered by the PCI
DMA-alias walk (different bus than the device), and every alias visited
by pci_for_each_dma_alias().  Those alternate BDFs are not separate
struct device attach targets, so they never received a trans_devid
reservation and could in principle collide with a dynamically allocated
trans_devid.

Introduce amd_iommu_trans_devid_reserve_pci_aliases() in trans_devid.c
and invoke it from amd_iommu_attach_device() immediately after the
primary amd_iommu_trans_devid_reserve() succeeds.  For PCI devices the
helper reserves the IVRS alias when it differs from the device BDF,
then walks pci_for_each_dma_alias() and reserves each alias BDF.
Repeated attach and overlap with the primary BDF in the PCI walk are
handled by the existing idempotency of amd_iommu_trans_devid_reserve()
(a second reserve of an already-reserved id succeeds).

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 drivers/iommu/amd/amd_iommu.h   |  2 ++
 drivers/iommu/amd/iommu.c       |  7 +++++
 drivers/iommu/amd/trans_devid.c | 45 +++++++++++++++++++++++++++++++++
 3 files changed, 54 insertions(+)

diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 284830673a87..f61cc51ef9a2 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -223,6 +223,8 @@ int amd_iommu_completion_wait(struct amd_iommu *iommu);
 void amd_iommu_pci_seg_trans_devid_init(struct amd_iommu_pci_seg *pci_seg);
 void amd_iommu_pci_seg_trans_devid_fini(struct amd_iommu_pci_seg *pci_seg);
 int amd_iommu_trans_devid_reserve(struct amd_iommu_pci_seg *pci_seg, u16 id);
+int amd_iommu_trans_devid_reserve_pci_aliases(struct amd_iommu *iommu,
+					      struct device *dev);
 #else
 static inline void
 amd_iommu_pci_seg_trans_devid_init(struct amd_iommu_pci_seg *pci_seg) { }
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 02b3d3c19936..6207879528bf 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3079,6 +3079,13 @@ static int amd_iommu_attach_device(struct iommu_domain *dom, struct device *dev,
 		pr_err("%s: Failed to reserve device id %#x\n", __func__, dev_data->devid);
 		return ret;
 	}
+
+	ret = amd_iommu_trans_devid_reserve_pci_aliases(iommu, dev);
+	if (ret) {
+		pr_err("%s: Failed to reserve translate devid for alias of %#x (err %d)\n",
+		       __func__, dev_data->devid, ret);
+		return ret;
+	}
 #endif
 
 	if (dev_data->domain)
diff --git a/drivers/iommu/amd/trans_devid.c b/drivers/iommu/amd/trans_devid.c
index 42ab19180e1c..a40686a576ec 100644
--- a/drivers/iommu/amd/trans_devid.c
+++ b/drivers/iommu/amd/trans_devid.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/pci.h>
 #include <linux/xarray.h>
 
 #include "amd_iommu.h"
@@ -76,3 +77,47 @@ int amd_iommu_trans_devid_reserve(struct amd_iommu_pci_seg *pci_seg, u16 id)
 			 pci_seg->id);
 	return ret;
 }
+
+static int reserve_trans_devid_each_dma_alias(struct pci_dev *pdev, u16 alias,
+					      void *data)
+{
+	struct amd_iommu_pci_seg *pci_seg = data;
+
+	(void)pdev;
+	return amd_iommu_trans_devid_reserve(pci_seg, alias);
+}
+
+/**
+ * amd_iommu_trans_devid_reserve_pci_aliases - reserve translate-device-ids for
+ * PCI DMA aliases and for the IVRS alias when it is not walked as a PCI DMA
+ * alias (different bus). Idempotent for repeated attach; see
+ * amd_iommu_trans_devid_reserve().
+ *
+ * Return: 0 on success or if @dev is not PCI; otherwise an errno from
+ * amd_iommu_trans_devid_reserve() or pci_for_each_dma_alias().
+ */
+int amd_iommu_trans_devid_reserve_pci_aliases(struct amd_iommu *iommu,
+					      struct device *dev)
+{
+	struct pci_dev *pdev;
+	struct amd_iommu_pci_seg *pci_seg;
+	u16 devid, ivrs_alias;
+	int ret;
+
+	if (!dev_is_pci(dev))
+		return 0;
+
+	pdev = to_pci_dev(dev);
+	pci_seg = iommu->pci_seg;
+	devid = pci_dev_id(pdev);
+
+	ivrs_alias = pci_seg->alias_table[devid];
+	if (ivrs_alias != devid) {
+		ret = amd_iommu_trans_devid_reserve(pci_seg, ivrs_alias);
+		if (ret)
+			return ret;
+	}
+
+	return pci_for_each_dma_alias(pdev, reserve_trans_devid_each_dma_alias,
+				      pci_seg);
+}
-- 
2.34.1


  parent reply	other threads:[~2026-07-27 13:32 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-27 13:28 [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 01/24] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-08-05 17:01   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-08-10  7:12   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-08-10  8:13   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-08-10  9:21   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-08-10 10:00   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-08-10 10:49   ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-08-10 11:07   ` Vasant Hegde
2026-07-27 13:29 ` [PATCH 11/24] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 12/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 16/24] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 18/24] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-08-10 15:17   ` Vasant Hegde
2026-07-27 13:29 ` [PATCH 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-27 13:29 ` Suravee Suthikulpanit [this message]
2026-07-27 13:29 ` [PATCH 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit

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