Re: [PATCH] x86/locking: Use sfence for wmb() if SSE is available

[Peter Zijlstra <peterz@infradead.org>]

On Sat, Aug 01, 2026 at 06:29:53PM +0000, Yao Zi wrote:
> When adding cc clobber to wmb()'s definition, the alternative()
> condition to use sfence was incorrectly raised from X86_FEATURE_XMM to
> X86_FEATURE_XMM2.
> 
> Restore the correct constraint for potential better performance on
> machines without SSE2.

So Google tells me that SSE was introduced with P-III, while SSE2 was
introduced with P4, so this affects only P-III.

Anything earlier won't care, and anything later will have DTRT.

I suppose we can do this, for those few people that still care about
P-III... *sigh*.

> Fixes: bd922477d935 ("locking/x86: Add cc clobber for ADDL")
> Signed-off-by: Yao Zi <me@ziyao.cc>
> Cc: stable@vger.kernel.org
> ---
>  arch/x86/include/asm/barrier.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
> index b0096b5645a9..e0e59da15748 100644
> --- a/arch/x86/include/asm/barrier.h
> +++ b/arch/x86/include/asm/barrier.h
> @@ -17,7 +17,7 @@
>  #define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \
>  				       X86_FEATURE_XMM2) ::: "memory", "cc")
>  #define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \
> -				       X86_FEATURE_XMM2) ::: "memory", "cc")
> +				       X86_FEATURE_XMM) ::: "memory", "cc")
>  #else
>  #define __mb()	asm volatile("mfence":::"memory")
>  #define __rmb()	asm volatile("lfence":::"memory")
> -- 
> 2.54.0
>