* [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
@ 2026-06-22 21:55 Jeffrey Yu
2026-08-04 6:08 ` kernel test robot
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Jeffrey Yu @ 2026-06-22 21:55 UTC (permalink / raw)
To: marek.vasut@gmail.com, tudor.ambarus@microchip.com
Cc: dwmw2@infradead.org, computersforpeace@gmail.com,
bbrezillon@kernel.org, richard@nod.at, open list,
linux-mtd@lists.infradead.org
Add JEDEC ID table entries for additional ISSI SPI-NOR
devices. Additionally added several structs to support ISSI octal flash
functionality. (Octal SPI 2026 revised)
These parts previously not yet supported.
With these entries, Linux software can match the device by JEDEC ID
and use the existing ISSI SPI-NOR device handling.
Newly added devices include:
- IS25WX256 (JEDEC 0x9d5b19)
https://www.issi.com/WW/pdf/25LX-WX256-128.pdf
- IS25LX256 (JEDEC 0x9d5a19)
https://www.issi.com/WW/pdf/25LX-WX256-128.pdf
- IS25WX512M (JEDEC 0x9d5b1a)
https://www.issi.com/WW/pdf/25LX-WX512M.pdf
- IS25LX512M (JEDEC 0x9d5a1a)
https://www.issi.com/WW/pdf/25LX-WX512M.pdf
- IS25WX01G (JEDEC 0x9d5b1b)
https://www.issi.com/WW/pdf/25LX-WX01G.pdf
- IS25LX01G (JEDEC 0x9d5a1b)
https://www.issi.com/WW/pdf/25LX-WX01G.pdf
Signed-off-by: Jeffrey Y <jeyu@issi.com>
---
drivers/mtd/spi-nor/issi.c | 242 +++++++++++++++++++++++++++++++++++++
1 file changed, 242 insertions(+)
diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 18d9a00aa22e..61597e9e962c 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -8,6 +8,182 @@
#include "core.h"
+
+static int spi_nor_issi_phy_enable(struct spi_nor *nor)
+{
+ struct spi_mem_op op;
+ u8 *buf = nor->bouncebuf;
+ int ret;
+
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto ret;
+
+ buf[0] = SPINOR_IS_EXSPI;
+
+ op = (struct spi_mem_op)
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
+ SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, buf, 1));
+
+ spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret)
+ goto ret;
+
+ nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
+ /* Read flash ID to make sure the switch was successful. */
+ op = (struct spi_mem_op)
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_DUMMY(0, 1),
+ SPI_MEM_OP_DATA_IN(nor->info->id->len, buf, 1));
+
+ spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret)
+ goto ret;
+
+ if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
+ goto ret;
+
+ return 0;
+ret:
+ nor->spimem->spi->controller->flags &= ~SPI_CONTROLLER_SDR_PHY;
+ return 0;
+}
+
+static int spi_nor_issi_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+ struct spi_mem_op op;
+ u8 *buf = nor->bouncebuf;
+ int ret;
+
+ if (enable) {
+ /* Use 20 dummy cycles for memory array reads. */
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
+ *buf = 20;
+ op = (struct spi_mem_op)
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
+ SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, buf, 1));
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret)
+ return ret;
+
+ ret = spi_nor_wait_till_ready(nor);
+ if (ret)
+ return ret;
+ }
+
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
+ if (enable)
+ *buf = SPINOR_IS_OCT_DTR;
+ else
+ *buf = SPINOR_IS_EXSPI;
+
+ op = (struct spi_mem_op)
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
+ SPI_MEM_OP_ADDR(enable ? 3 : 4,
+ SPINOR_REG_IS_CFR0V, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, buf, 1));
+
+ if (!enable)
+ spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret)
+ return ret;
+
+ if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
+ return 0;
+
+ /* Read flash ID to make sure the switch was successful. */
+ op = (struct spi_mem_op)
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_DUMMY(enable ? 8 : 0, 1),
+ SPI_MEM_OP_DATA_IN(round_up(nor->info->id->len, 2),
+ buf, 1));
+
+ if (enable)
+ spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ if (ret)
+ return ret;
+
+ if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
+ return -EINVAL;
+
+ return 0;
+}
+
+static int is25wx256_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
+{
+ int ret;
+
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
+ ret = spi_nor_set_4byte_addr_mode(nor, enable);
+ if (ret)
+ return ret;
+
+ return spi_nor_write_disable(nor);
+}
+
+static void is25wx256_default_init(struct spi_nor *nor)
+{
+ struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
+
+ params->set_octal_dtr = spi_nor_issi_octal_dtr_enable;
+ params->set_4byte_addr_mode = is25wx256_set_4byte_addr_mode;
+ params->phy_enable = spi_nor_issi_phy_enable;
+}
+
+static int is25wx256_post_sfdp_fixup(struct spi_nor *nor)
+{
+ struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
+
+ /* Set the Fast Read settings. */
+ params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
+ spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR],
+ 0, 20, SPINOR_OP_IS_DTR_RD,
+ SNOR_PROTO_8_8_8_DTR);
+
+ nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
+ params->rdsr_dummy = 8;
+ params->rdsr_addr_nbytes = 0;
+
+ /*
+ * The BFPT quad enable field is set to a reserved value so the quad
+ * enable function is ignored by spi_nor_parse_bfpt(). Make sure we
+ * disable it.
+ */
+ params->quad_enable = NULL;
+
+ return 0;
+}
+
+static struct spi_nor_fixups is25wx256_fixups = {
+ .default_init = is25wx256_default_init,
+ .post_sfdp = is25wx256_post_sfdp_fixup,
+};
+
static int
is25lp256_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
@@ -126,6 +302,72 @@ static const struct flash_info issi_nor_parts[] = {
.flags = SPI_NOR_QUAD_PP,
.fixups = &is25lp256_fixups,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5b, 0x19),
+ .name = "is25wx256",
+ .size = SZ_256M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5a, 0x19),
+ .name = "is25lx256",
+ .size = SZ_256M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5b, 0x1a),
+ .name = "is25wx512m",
+ .size = SZ_512M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5a, 0x1a),
+ .name = "is25lx512m",
+ .size = SZ_512M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5b, 0x1b),
+ .name = "is25wx01g",
+ .size = SZ_1G,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
+ }, {
+ .id = SNOR_ID(0x9d, 0x5a, 0x1b),
+ .name = "is25lx01g",
+ .size = SZ_1G,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+ .mfr_flags = USE_FSR,
+ .fixups = &is25wx256_fixups,
}
};
--
2.43.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
2026-06-22 21:55 [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised) Jeffrey Yu
@ 2026-08-04 6:08 ` kernel test robot
2026-08-04 8:56 ` kernel test robot
2026-08-04 12:06 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2026-08-04 6:08 UTC (permalink / raw)
To: Jeffrey Yu, marek.vasut@gmail.com, tudor.ambarus@microchip.com
Cc: oe-kbuild-all, dwmw2@infradead.org, computersforpeace@gmail.com,
bbrezillon@kernel.org, richard@nod.at, open list,
linux-mtd@lists.infradead.org
Hi Jeffrey,
kernel test robot noticed the following build errors:
[auto build test ERROR on mtd/spi-nor/next]
[also build test ERROR on linus/master v7.2-rc6 next-20260803]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jeffrey-Yu/Add-JEDEC-ID-table-entries-for-additional-ISSI-SPI-NOR-devices-Additionally-added-several-structs-to-support-ISSI-octal-/20260804-122036
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-nor/next
patch link: https://lore.kernel.org/r/LV8PR19MB85976C665A59A0DEBAF4F285B6EF2%40LV8PR19MB8597.namprd19.prod.outlook.com
patch subject: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20260804/202608041352.DkGtf1aE-lkp@intel.com/config)
compiler: powerpc64-linux-gcc (GCC) 16.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260804/202608041352.DkGtf1aE-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202608041352.DkGtf1aE-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/mtd/spi-nor/issi.c: In function 'spi_nor_issi_phy_enable':
>> drivers/mtd/spi-nor/issi.c:22:26: error: 'SPINOR_IS_EXSPI' undeclared (first use in this function); did you mean 'SPINOR_OP_EX4B'?
22 | buf[0] = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
| SPINOR_OP_EX4B
drivers/mtd/spi-nor/issi.c:22:26: note: each undeclared identifier is reported only once for each function it appears in
In file included from include/linux/mtd/spi-nor.h:11,
from drivers/mtd/spi-nor/issi.c:7:
>> drivers/mtd/spi-nor/issi.c:25:59: error: 'SPINOR_OP_IS_WR_ANY_REG' undeclared (first use in this function)
25 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:219:24: note: in definition of macro 'SPI_MEM_OP'
219 | .cmd = __cmd, \
| ^~~~~
drivers/mtd/spi-nor/issi.c:25:44: note: in expansion of macro 'SPI_MEM_OP_CMD'
25 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:26:52: error: 'SPINOR_REG_IS_CFR0V' undeclared (first use in this function)
26 | SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:26:33: note: in expansion of macro 'SPI_MEM_OP_ADDR'
26 | SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:36:56: error: 'SPI_CONTROLLER_SDR_PHY' undeclared (first use in this function); did you mean 'SPI_CONTROLLER_NO_TX'?
36 | nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
| ^~~~~~~~~~~~~~~~~~~~~~
| SPI_CONTROLLER_NO_TX
drivers/mtd/spi-nor/issi.c: In function 'spi_nor_issi_octal_dtr_enable':
drivers/mtd/spi-nor/issi.c:73:59: error: 'SPINOR_OP_IS_WR_ANY_REG' undeclared (first use in this function)
73 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:219:24: note: in definition of macro 'SPI_MEM_OP'
219 | .cmd = __cmd, \
| ^~~~~
drivers/mtd/spi-nor/issi.c:73:44: note: in expansion of macro 'SPI_MEM_OP_CMD'
73 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:74:60: error: 'SPINOR_REG_IS_CFR1V' undeclared (first use in this function)
74 | SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:74:41: note: in expansion of macro 'SPI_MEM_OP_ADDR'
74 | SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
| ^~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:92:32: error: 'SPINOR_IS_OCT_DTR' undeclared (first use in this function)
92 | *buf = SPINOR_IS_OCT_DTR;
| ^~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:94:32: error: 'SPINOR_IS_EXSPI' undeclared (first use in this function); did you mean 'SPINOR_OP_EX4B'?
94 | *buf = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
| SPINOR_OP_EX4B
drivers/mtd/spi-nor/issi.c:99:57: error: 'SPINOR_REG_IS_CFR0V' undeclared (first use in this function)
99 | SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:98:41: note: in expansion of macro 'SPI_MEM_OP_ADDR'
98 | SPI_MEM_OP_ADDR(enable ? 3 : 4,
| ^~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:110:35: error: 'SNOR_F_HAS_STACKED' undeclared (first use in this function); did you mean 'SNOR_F_HAS_LOCK'?
110 | if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
| ^~~~~~~~~~~~~~~~~~
| SNOR_F_HAS_LOCK
drivers/mtd/spi-nor/issi.c: In function 'is25wx256_default_init':
>> drivers/mtd/spi-nor/issi.c:151:58: error: implicit declaration of function 'spi_nor_get_params' [-Wimplicit-function-declaration]
151 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:151:58: error: initialization of 'struct spi_nor_flash_parameter *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
>> drivers/mtd/spi-nor/issi.c:155:23: error: 'struct spi_nor_flash_parameter' has no member named 'phy_enable'
155 | params->phy_enable = spi_nor_issi_phy_enable;
| ^~
drivers/mtd/spi-nor/issi.c: In function 'is25wx256_post_sfdp_fixup':
drivers/mtd/spi-nor/issi.c:160:58: error: initialization of 'struct spi_nor_flash_parameter *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
160 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:165:72: error: 'SPINOR_OP_IS_DTR_RD' undeclared (first use in this function); did you mean 'SPINOR_OP_ESECR'?
165 | 0, 20, SPINOR_OP_IS_DTR_RD,
| ^~~~~~~~~~~~~~~~~~~
| SPINOR_OP_ESECR
drivers/mtd/spi-nor/issi.c: At top level:
>> drivers/mtd/spi-nor/issi.c:314:30: error: 'USE_FSR' undeclared here (not in a function)
314 | .mfr_flags = USE_FSR,
| ^~~~~~~
vim +22 drivers/mtd/spi-nor/issi.c
10
11
12 static int spi_nor_issi_phy_enable(struct spi_nor *nor)
13 {
14 struct spi_mem_op op;
15 u8 *buf = nor->bouncebuf;
16 int ret;
17
18 ret = spi_nor_write_enable(nor);
19 if (ret)
20 goto ret;
21
> 22 buf[0] = SPINOR_IS_EXSPI;
23
24 op = (struct spi_mem_op)
> 25 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
> 26 SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
27 SPI_MEM_OP_NO_DUMMY,
28 SPI_MEM_OP_DATA_OUT(1, buf, 1));
29
30 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
31
32 ret = spi_mem_exec_op(nor->spimem, &op);
33 if (ret)
34 goto ret;
35
> 36 nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
37 /* Read flash ID to make sure the switch was successful. */
38 op = (struct spi_mem_op)
39 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
40 SPI_MEM_OP_NO_ADDR,
41 SPI_MEM_OP_DUMMY(0, 1),
42 SPI_MEM_OP_DATA_IN(nor->info->id->len, buf, 1));
43
44 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
45
46 ret = spi_mem_exec_op(nor->spimem, &op);
47 if (ret)
48 goto ret;
49
50 if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
51 goto ret;
52
53 return 0;
54 ret:
55 nor->spimem->spi->controller->flags &= ~SPI_CONTROLLER_SDR_PHY;
56 return 0;
57 }
58
59 static int spi_nor_issi_octal_dtr_enable(struct spi_nor *nor, bool enable)
60 {
61 struct spi_mem_op op;
62 u8 *buf = nor->bouncebuf;
63 int ret;
64
65 if (enable) {
66 /* Use 20 dummy cycles for memory array reads. */
67 ret = spi_nor_write_enable(nor);
68 if (ret)
69 return ret;
70
71 *buf = 20;
72 op = (struct spi_mem_op)
73 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
> 74 SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
75 SPI_MEM_OP_NO_DUMMY,
76 SPI_MEM_OP_DATA_OUT(1, buf, 1));
77
78 ret = spi_mem_exec_op(nor->spimem, &op);
79 if (ret)
80 return ret;
81
82 ret = spi_nor_wait_till_ready(nor);
83 if (ret)
84 return ret;
85 }
86
87 ret = spi_nor_write_enable(nor);
88 if (ret)
89 return ret;
90
91 if (enable)
> 92 *buf = SPINOR_IS_OCT_DTR;
93 else
94 *buf = SPINOR_IS_EXSPI;
95
96 op = (struct spi_mem_op)
97 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
98 SPI_MEM_OP_ADDR(enable ? 3 : 4,
99 SPINOR_REG_IS_CFR0V, 1),
100 SPI_MEM_OP_NO_DUMMY,
101 SPI_MEM_OP_DATA_OUT(1, buf, 1));
102
103 if (!enable)
104 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
105
106 ret = spi_mem_exec_op(nor->spimem, &op);
107 if (ret)
108 return ret;
109
> 110 if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
111 return 0;
112
113 /* Read flash ID to make sure the switch was successful. */
114 op = (struct spi_mem_op)
115 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
116 SPI_MEM_OP_NO_ADDR,
117 SPI_MEM_OP_DUMMY(enable ? 8 : 0, 1),
118 SPI_MEM_OP_DATA_IN(round_up(nor->info->id->len, 2),
119 buf, 1));
120
121 if (enable)
122 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
123
124 ret = spi_mem_exec_op(nor->spimem, &op);
125 if (ret)
126 return ret;
127
128 if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
129 return -EINVAL;
130
131 return 0;
132 }
133
134 static int is25wx256_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
135 {
136 int ret;
137
138 ret = spi_nor_write_enable(nor);
139 if (ret)
140 return ret;
141
142 ret = spi_nor_set_4byte_addr_mode(nor, enable);
143 if (ret)
144 return ret;
145
146 return spi_nor_write_disable(nor);
147 }
148
149 static void is25wx256_default_init(struct spi_nor *nor)
150 {
> 151 struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
152
153 params->set_octal_dtr = spi_nor_issi_octal_dtr_enable;
154 params->set_4byte_addr_mode = is25wx256_set_4byte_addr_mode;
> 155 params->phy_enable = spi_nor_issi_phy_enable;
156 }
157
158 static int is25wx256_post_sfdp_fixup(struct spi_nor *nor)
159 {
160 struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
161
162 /* Set the Fast Read settings. */
163 params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
164 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR],
> 165 0, 20, SPINOR_OP_IS_DTR_RD,
166 SNOR_PROTO_8_8_8_DTR);
167
168 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
169 params->rdsr_dummy = 8;
170 params->rdsr_addr_nbytes = 0;
171
172 /*
173 * The BFPT quad enable field is set to a reserved value so the quad
174 * enable function is ignored by spi_nor_parse_bfpt(). Make sure we
175 * disable it.
176 */
177 params->quad_enable = NULL;
178
179 return 0;
180 }
181
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
2026-06-22 21:55 [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised) Jeffrey Yu
2026-08-04 6:08 ` kernel test robot
@ 2026-08-04 8:56 ` kernel test robot
2026-08-04 12:06 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2026-08-04 8:56 UTC (permalink / raw)
To: Jeffrey Yu, marek.vasut@gmail.com, tudor.ambarus@microchip.com
Cc: oe-kbuild-all, dwmw2@infradead.org, computersforpeace@gmail.com,
bbrezillon@kernel.org, richard@nod.at, open list,
linux-mtd@lists.infradead.org
Hi Jeffrey,
kernel test robot noticed the following build warnings:
[auto build test WARNING on mtd/spi-nor/next]
[also build test WARNING on linus/master v7.2-rc6 next-20260803]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jeffrey-Yu/Add-JEDEC-ID-table-entries-for-additional-ISSI-SPI-NOR-devices-Additionally-added-several-structs-to-support-ISSI-octal-/20260804-122036
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-nor/next
patch link: https://lore.kernel.org/r/LV8PR19MB85976C665A59A0DEBAF4F285B6EF2%40LV8PR19MB8597.namprd19.prod.outlook.com
patch subject: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
config: nios2-allmodconfig (https://download.01.org/0day-ci/archive/20260804/202608041622.usbEnS4x-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260804/202608041622.usbEnS4x-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202608041622.usbEnS4x-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/mtd/spi-nor/issi.c: In function 'spi_nor_issi_phy_enable':
drivers/mtd/spi-nor/issi.c:22:26: error: 'SPINOR_IS_EXSPI' undeclared (first use in this function); did you mean 'SPINOR_OP_EX4B'?
22 | buf[0] = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
| SPINOR_OP_EX4B
drivers/mtd/spi-nor/issi.c:22:26: note: each undeclared identifier is reported only once for each function it appears in
In file included from include/linux/mtd/spi-nor.h:11,
from drivers/mtd/spi-nor/issi.c:7:
drivers/mtd/spi-nor/issi.c:25:59: error: 'SPINOR_OP_IS_WR_ANY_REG' undeclared (first use in this function)
25 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:219:24: note: in definition of macro 'SPI_MEM_OP'
219 | .cmd = __cmd, \
| ^~~~~
drivers/mtd/spi-nor/issi.c:25:44: note: in expansion of macro 'SPI_MEM_OP_CMD'
25 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:26:52: error: 'SPINOR_REG_IS_CFR0V' undeclared (first use in this function)
26 | SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:26:33: note: in expansion of macro 'SPI_MEM_OP_ADDR'
26 | SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:36:56: error: 'SPI_CONTROLLER_SDR_PHY' undeclared (first use in this function); did you mean 'SPI_CONTROLLER_NO_RX'?
36 | nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
| ^~~~~~~~~~~~~~~~~~~~~~
| SPI_CONTROLLER_NO_RX
In file included from include/linux/mtd/spi-nor.h:11,
from drivers/mtd/spi-nor/issi.c:7:
drivers/mtd/spi-nor/issi.c: In function 'spi_nor_issi_octal_dtr_enable':
drivers/mtd/spi-nor/issi.c:73:59: error: 'SPINOR_OP_IS_WR_ANY_REG' undeclared (first use in this function)
73 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:219:24: note: in definition of macro 'SPI_MEM_OP'
219 | .cmd = __cmd, \
| ^~~~~
drivers/mtd/spi-nor/issi.c:73:44: note: in expansion of macro 'SPI_MEM_OP_CMD'
73 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:74:60: error: 'SPINOR_REG_IS_CFR1V' undeclared (first use in this function)
74 | SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:74:41: note: in expansion of macro 'SPI_MEM_OP_ADDR'
74 | SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
| ^~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:92:32: error: 'SPINOR_IS_OCT_DTR' undeclared (first use in this function)
92 | *buf = SPINOR_IS_OCT_DTR;
| ^~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:94:32: error: 'SPINOR_IS_EXSPI' undeclared (first use in this function); did you mean 'SPINOR_OP_EX4B'?
94 | *buf = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
| SPINOR_OP_EX4B
In file included from include/linux/mtd/spi-nor.h:11,
from drivers/mtd/spi-nor/issi.c:7:
drivers/mtd/spi-nor/issi.c:99:57: error: 'SPINOR_REG_IS_CFR0V' undeclared (first use in this function)
99 | SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
include/linux/spi/spi-mem.h:220:25: note: in definition of macro 'SPI_MEM_OP'
220 | .addr = __addr, \
| ^~~~~~
drivers/mtd/spi-nor/issi.c:98:41: note: in expansion of macro 'SPI_MEM_OP_ADDR'
98 | SPI_MEM_OP_ADDR(enable ? 3 : 4,
| ^~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:110:35: error: 'SNOR_F_HAS_STACKED' undeclared (first use in this function); did you mean 'SNOR_F_HAS_LOCK'?
110 | if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
| ^~~~~~~~~~~~~~~~~~
| SNOR_F_HAS_LOCK
drivers/mtd/spi-nor/issi.c: In function 'is25wx256_default_init':
drivers/mtd/spi-nor/issi.c:151:58: error: implicit declaration of function 'spi_nor_get_params' [-Werror=implicit-function-declaration]
151 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:151:58: warning: initialization of 'struct spi_nor_flash_parameter *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
drivers/mtd/spi-nor/issi.c:155:23: error: 'struct spi_nor_flash_parameter' has no member named 'phy_enable'
155 | params->phy_enable = spi_nor_issi_phy_enable;
| ^~
drivers/mtd/spi-nor/issi.c: In function 'is25wx256_post_sfdp_fixup':
drivers/mtd/spi-nor/issi.c:160:58: warning: initialization of 'struct spi_nor_flash_parameter *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
160 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^~~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:165:72: error: 'SPINOR_OP_IS_DTR_RD' undeclared (first use in this function); did you mean 'SPINOR_OP_RDSR2'?
165 | 0, 20, SPINOR_OP_IS_DTR_RD,
| ^~~~~~~~~~~~~~~~~~~
| SPINOR_OP_RDSR2
drivers/mtd/spi-nor/issi.c: At top level:
drivers/mtd/spi-nor/issi.c:314:30: error: 'USE_FSR' undeclared here (not in a function)
314 | .mfr_flags = USE_FSR,
| ^~~~~~~
cc1: some warnings being treated as errors
vim +151 drivers/mtd/spi-nor/issi.c
148
149 static void is25wx256_default_init(struct spi_nor *nor)
150 {
> 151 struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
152
153 params->set_octal_dtr = spi_nor_issi_octal_dtr_enable;
154 params->set_4byte_addr_mode = is25wx256_set_4byte_addr_mode;
155 params->phy_enable = spi_nor_issi_phy_enable;
156 }
157
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
2026-06-22 21:55 [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised) Jeffrey Yu
2026-08-04 6:08 ` kernel test robot
2026-08-04 8:56 ` kernel test robot
@ 2026-08-04 12:06 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2026-08-04 12:06 UTC (permalink / raw)
To: Jeffrey Yu, marek.vasut@gmail.com, tudor.ambarus@microchip.com
Cc: llvm, oe-kbuild-all, dwmw2@infradead.org,
computersforpeace@gmail.com, bbrezillon@kernel.org,
richard@nod.at, open list, linux-mtd@lists.infradead.org
Hi Jeffrey,
kernel test robot noticed the following build errors:
[auto build test ERROR on mtd/spi-nor/next]
[also build test ERROR on linus/master v7.2-rc6 next-20260803]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jeffrey-Yu/Add-JEDEC-ID-table-entries-for-additional-ISSI-SPI-NOR-devices-Additionally-added-several-structs-to-support-ISSI-octal-/20260804-122036
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-nor/next
patch link: https://lore.kernel.org/r/LV8PR19MB85976C665A59A0DEBAF4F285B6EF2%40LV8PR19MB8597.namprd19.prod.outlook.com
patch subject: [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised)
config: hexagon-randconfig-002-20260804 (https://download.01.org/0day-ci/archive/20260804/202608041903.oQQ0fMx3-lkp@intel.com/config)
compiler: clang version 24.0.0git (https://github.com/llvm/llvm-project bacfe2950f8218268fcc0a8765644ea0c15f0360)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260804/202608041903.oQQ0fMx3-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202608041903.oQQ0fMx3-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/mtd/spi-nor/issi.c:22:12: error: use of undeclared identifier 'SPINOR_IS_EXSPI'
22 | buf[0] = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:25:31: error: use of undeclared identifier 'SPINOR_OP_IS_WR_ANY_REG'
25 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:26:24: error: use of undeclared identifier 'SPINOR_REG_IS_CFR0V'
26 | SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:36:42: error: use of undeclared identifier 'SPI_CONTROLLER_SDR_PHY'
36 | nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:55:43: error: use of undeclared identifier 'SPI_CONTROLLER_SDR_PHY'
55 | nor->spimem->spi->controller->flags &= ~SPI_CONTROLLER_SDR_PHY;
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:73:31: error: use of undeclared identifier 'SPINOR_OP_IS_WR_ANY_REG'
73 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:74:25: error: use of undeclared identifier 'SPINOR_REG_IS_CFR1V'
74 | SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
| ^~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:92:11: error: use of undeclared identifier 'SPINOR_IS_OCT_DTR'
92 | *buf = SPINOR_IS_OCT_DTR;
| ^~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:94:11: error: use of undeclared identifier 'SPINOR_IS_EXSPI'
94 | *buf = SPINOR_IS_EXSPI;
| ^~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:97:30: error: use of undeclared identifier 'SPINOR_OP_IS_WR_ANY_REG'
97 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/issi.c:99:8: error: use of undeclared identifier 'SPINOR_REG_IS_CFR0V'
99 | SPINOR_REG_IS_CFR0V, 1),
| ^~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:110:21: error: use of undeclared identifier 'SNOR_F_HAS_STACKED'; did you mean 'SNOR_F_HAS_LOCK'?
110 | if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
| ^~~~~~~~~~~~~~~~~~
| SNOR_F_HAS_LOCK
drivers/mtd/spi-nor/core.h:131:2: note: 'SNOR_F_HAS_LOCK' declared here
131 | SNOR_F_HAS_LOCK = BIT(5),
| ^
>> drivers/mtd/spi-nor/issi.c:151:44: error: call to undeclared function 'spi_nor_get_params'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
151 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^
>> drivers/mtd/spi-nor/issi.c:151:35: error: incompatible integer to pointer conversion initializing 'struct spi_nor_flash_parameter *' with an expression of type 'int' [-Wint-conversion]
151 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:155:11: error: no member named 'phy_enable' in 'struct spi_nor_flash_parameter'
155 | params->phy_enable = spi_nor_issi_phy_enable;
| ~~~~~~ ^
drivers/mtd/spi-nor/issi.c:160:44: error: call to undeclared function 'spi_nor_get_params'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
160 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^
drivers/mtd/spi-nor/issi.c:160:35: error: incompatible integer to pointer conversion initializing 'struct spi_nor_flash_parameter *' with an expression of type 'int' [-Wint-conversion]
160 | struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:165:16: error: use of undeclared identifier 'SPINOR_OP_IS_DTR_RD'
165 | 0, 20, SPINOR_OP_IS_DTR_RD,
| ^~~~~~~~~~~~~~~~~~~
>> drivers/mtd/spi-nor/issi.c:314:16: error: use of undeclared identifier 'USE_FSR'
314 | .mfr_flags = USE_FSR,
| ^~~~~~~
fatal error: too many errors emitted, stopping now [-ferror-limit=]
20 errors generated.
vim +/SPINOR_IS_EXSPI +22 drivers/mtd/spi-nor/issi.c
10
11
12 static int spi_nor_issi_phy_enable(struct spi_nor *nor)
13 {
14 struct spi_mem_op op;
15 u8 *buf = nor->bouncebuf;
16 int ret;
17
18 ret = spi_nor_write_enable(nor);
19 if (ret)
20 goto ret;
21
> 22 buf[0] = SPINOR_IS_EXSPI;
23
24 op = (struct spi_mem_op)
> 25 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
> 26 SPI_MEM_OP_ADDR(4, SPINOR_REG_IS_CFR0V, 1),
27 SPI_MEM_OP_NO_DUMMY,
28 SPI_MEM_OP_DATA_OUT(1, buf, 1));
29
30 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
31
32 ret = spi_mem_exec_op(nor->spimem, &op);
33 if (ret)
34 goto ret;
35
> 36 nor->spimem->spi->controller->flags |= SPI_CONTROLLER_SDR_PHY;
37 /* Read flash ID to make sure the switch was successful. */
38 op = (struct spi_mem_op)
39 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
40 SPI_MEM_OP_NO_ADDR,
41 SPI_MEM_OP_DUMMY(0, 1),
42 SPI_MEM_OP_DATA_IN(nor->info->id->len, buf, 1));
43
44 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_1_1_1);
45
46 ret = spi_mem_exec_op(nor->spimem, &op);
47 if (ret)
48 goto ret;
49
50 if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
51 goto ret;
52
53 return 0;
54 ret:
55 nor->spimem->spi->controller->flags &= ~SPI_CONTROLLER_SDR_PHY;
56 return 0;
57 }
58
59 static int spi_nor_issi_octal_dtr_enable(struct spi_nor *nor, bool enable)
60 {
61 struct spi_mem_op op;
62 u8 *buf = nor->bouncebuf;
63 int ret;
64
65 if (enable) {
66 /* Use 20 dummy cycles for memory array reads. */
67 ret = spi_nor_write_enable(nor);
68 if (ret)
69 return ret;
70
71 *buf = 20;
72 op = (struct spi_mem_op)
73 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
> 74 SPI_MEM_OP_ADDR(3, SPINOR_REG_IS_CFR1V, 1),
75 SPI_MEM_OP_NO_DUMMY,
76 SPI_MEM_OP_DATA_OUT(1, buf, 1));
77
78 ret = spi_mem_exec_op(nor->spimem, &op);
79 if (ret)
80 return ret;
81
82 ret = spi_nor_wait_till_ready(nor);
83 if (ret)
84 return ret;
85 }
86
87 ret = spi_nor_write_enable(nor);
88 if (ret)
89 return ret;
90
91 if (enable)
> 92 *buf = SPINOR_IS_OCT_DTR;
93 else
94 *buf = SPINOR_IS_EXSPI;
95
96 op = (struct spi_mem_op)
97 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_IS_WR_ANY_REG, 1),
98 SPI_MEM_OP_ADDR(enable ? 3 : 4,
99 SPINOR_REG_IS_CFR0V, 1),
100 SPI_MEM_OP_NO_DUMMY,
101 SPI_MEM_OP_DATA_OUT(1, buf, 1));
102
103 if (!enable)
104 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
105
106 ret = spi_mem_exec_op(nor->spimem, &op);
107 if (ret)
108 return ret;
109
> 110 if ((nor->flags & SNOR_F_HAS_STACKED) && nor->spimem->spi->cs_index_mask == 1)
111 return 0;
112
113 /* Read flash ID to make sure the switch was successful. */
114 op = (struct spi_mem_op)
115 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
116 SPI_MEM_OP_NO_ADDR,
117 SPI_MEM_OP_DUMMY(enable ? 8 : 0, 1),
118 SPI_MEM_OP_DATA_IN(round_up(nor->info->id->len, 2),
119 buf, 1));
120
121 if (enable)
122 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
123
124 ret = spi_mem_exec_op(nor->spimem, &op);
125 if (ret)
126 return ret;
127
128 if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
129 return -EINVAL;
130
131 return 0;
132 }
133
134 static int is25wx256_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
135 {
136 int ret;
137
138 ret = spi_nor_write_enable(nor);
139 if (ret)
140 return ret;
141
142 ret = spi_nor_set_4byte_addr_mode(nor, enable);
143 if (ret)
144 return ret;
145
146 return spi_nor_write_disable(nor);
147 }
148
149 static void is25wx256_default_init(struct spi_nor *nor)
150 {
> 151 struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
152
153 params->set_octal_dtr = spi_nor_issi_octal_dtr_enable;
154 params->set_4byte_addr_mode = is25wx256_set_4byte_addr_mode;
> 155 params->phy_enable = spi_nor_issi_phy_enable;
156 }
157
158 static int is25wx256_post_sfdp_fixup(struct spi_nor *nor)
159 {
160 struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
161
162 /* Set the Fast Read settings. */
163 params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
164 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR],
> 165 0, 20, SPINOR_OP_IS_DTR_RD,
166 SNOR_PROTO_8_8_8_DTR);
167
168 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
169 params->rdsr_dummy = 8;
170 params->rdsr_addr_nbytes = 0;
171
172 /*
173 * The BFPT quad enable field is set to a reserved value so the quad
174 * enable function is ignored by spi_nor_parse_bfpt(). Make sure we
175 * disable it.
176 */
177 params->quad_enable = NULL;
178
179 return 0;
180 }
181
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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2026-06-22 21:55 [PATCH] Add JEDEC ID table entries for additional ISSI SPI-NOR devices. Additionally added several structs to support ISSI octal flash functionality. (Octal SPI 2026 revised) Jeffrey Yu
2026-08-04 6:08 ` kernel test robot
2026-08-04 8:56 ` kernel test robot
2026-08-04 12:06 ` kernel test robot
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