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* [PATCH v4 00/21] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO
@ 2026-08-20 21:41 Andrew Jones
  2026-08-20 21:41 ` [PATCH v4 01/21] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
                   ` (20 more replies)
  0 siblings, 21 replies; 25+ messages in thread
From: Andrew Jones @ 2026-08-20 21:41 UTC (permalink / raw)
  To: linux-riscv, iommu
  Cc: linux-kernel, tomasz.jeznach, tjeznach, jgg, jgg, joro, will,
	robin.murphy, pjw, palmer, anup, tglx, kevin.tian, fangyu.yu

This series adds MSI remapping for IMSIC so a device's MSI target gets
translated the same way its DMA does, allowing RISC-V to enable IOMMU_DMA
and paging domains by default.

v1[1] used get_resv_regions() with IOMMU_RESV_DIRECT_RELAXABLE to identity
map IMSIC pages, but that was rejected as only a workaround, and the
proposal for v2 was to follow ARM's approach. This series does that at a
high level by introducing an IOMMU IRQ domain, mapping MSI targets into
the device's DMA address space, and rewriting composed messages with
msi_msg_set_addr(). A new iommu_dma_map_msi() supports both DMA-IOMMU and
iommufd domains and returns each mapping to the interrupt-remapping
driver rather than caching it on an MSI descriptor.

ARM can map a fixed doorbell PA per ITS and cache its IOVA on the
descriptor because affinity changes only hardware routing, not the
composed address. An IMSIC target PA changes with affinity, and MSI
composition may run in atomic context, so mapping the selected target on
demand is not an option. This series pre-maps the supervisor IMSIC page
for every possible CPU into a domain-local PA-to-IOVA table when remapped
IRQs are first allocated, allowing composition to select the target with
an O(1) lookup. If iommufd replaces a paging domain while IRQs remain
allocated, the incoming domain's table is rebuilt before it is attached.

The series also carries the remaining plumbing needed for RISC-V PCIe
device assignment through VFIO/KVM: the RISC-V IOMMU reports DMA
cache-coherency capability for coherent devices, VFIO type1 and KVM_VFIO
are enabled for RISC-V, defconfig enables IOMMUFD/VFIO as modules with
cdev support, and the generic VFIO/iommufd selftests can be built for
RISC-V. The RISC-V IOMMU specification does not provide MSI data
validation, so the interrupt-remapping domain cannot provide isolated
MSI. VFIO device assignment therefore requires the applicable
allow_unsafe_interrupts=1 module parameter. Direct MSI routing to guest
interrupt files (irqbypass) is not yet supported by this series and will
be posted separately on top.

LLM-based coding assistants were used during development for code
exploration ("super grep" as one of my colleagues calls it), patch review,
test execution, and drafting and editing commit messages and this cover
letter. I reviewed and finalized all resulting code and text. Per-patch
Assisted-by tags are omitted in light of the ongoing discussion about
simplifying coding-assistant attribution[2].

Thanks,
drew

[1] https://lore.kernel.org/all/20260508212339.381933-1-andrew.jones@oss.qualcomm.com/
[2] https://lore.kernel.org/all/20260701-work-coding-assistants-v1-1-a20a94d1d606@kernel.org/

v4:
- Rebased onto linux-iommu/next
- Addressed Thomas's v3 review comments[3]
- Added documentation for mapping MSIs while replacing an IOMMU domain
- Reworked domain replacement to rebuild MSI IOVAs through each domain's
  backend rather than copying iommufd tables
- Rejected passthrough MSI mapping results when preparing an incoming
  paging domain, preventing a first iommufd attach with live MSIs from
  caching an unusable address-zero table [PatchWise]
- Deferred interrupt-remapping domain publication until probe_finalize(),
  after the IOMMU core assigns the device group [PatchWise]
- Refreshed stale OF and ACPI platform MSI domains before setting up
  interrupt remapping [PatchWise]
- Used vcalloc() for the sparse IMSIC PA-to-IOVA table [Sashiko]
- Reported IOMMU_CAP_CACHE_COHERENCY only for DMA-coherent devices [Sashiko]
- Clarified that only direct identity <-> paging domain transitions are
  rejected while IRQs are allocated [Sashiko]
- Used the old-domain argument to avoid unnecessary RCU lookups in attach
  callbacks [Sashiko]
- Fixed the VFIO selftest architecture check to use riscv64 [Sashiko]
- Reworked commit messages throughout

[3] https://lore.kernel.org/all/20260807181713.228535-1-andrew.jones@oss.qualcomm.com/


Andrew Jones (18):
  iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap
  iommufd: Add iommufd_sw_map_msi()
  iommu/dma: Add iommu_dma_sw_map_msi()
  iommu/dma: Add iommu_dma_map_msi()
  iommu: Document MSI mapping during domain replacement
  genirq/msi: Provide DOMAIN_BUS_MSI_REMAP
  irqchip/riscv-imsic: Compose MSI updates through the hierarchy
  iommu/riscv: Add IRQ domain for interrupt remapping
  iommu/riscv: Refresh platform MSI domain before IR setup
  iommu/riscv: Prepare info->domain for concurrent RCU read access
  iommu/riscv: Reserve an MSI IOVA window for iommufd
  iommu/riscv: Pre-map IMSIC MSI targets
  iommu/riscv: Preserve MSI IOVA state across domain replacement
  iommu/riscv: Gate direct identity boundary switches with live MSIs
  iommu/riscv: Remap IMSIC targets during MSI composition
  iommu/riscv: Report cache coherency capability
  riscv: defconfig: Enable IOMMUFD and VFIO
  selftests/vfio: Allow building on RISC-V

Tomasz Jeznach (3):
  iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V
  vfio: enable IOMMU_TYPE1 for RISC-V
  RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch

 arch/riscv/configs/defconfig               |   4 +
 arch/riscv/kvm/Kconfig                     |   1 +
 drivers/iommu/Kconfig                      |   2 +-
 drivers/iommu/dma-iommu.c                  |  33 +-
 drivers/iommu/dma-iommu.h                  |  12 +-
 drivers/iommu/iommu-priv.h                 |  11 +-
 drivers/iommu/iommu.c                      | 109 +++++-
 drivers/iommu/iommufd/device.c             |   3 +-
 drivers/iommu/iommufd/driver.c             |  87 +++--
 drivers/iommu/iommufd/hw_pagetable.c       |   1 +
 drivers/iommu/iommufd/iommufd_private.h    |  41 ++-
 drivers/iommu/riscv/Kconfig                |   1 +
 drivers/iommu/riscv/Makefile               |   2 +-
 drivers/iommu/riscv/iommu-ir.c             | 397 +++++++++++++++++++++
 drivers/iommu/riscv/iommu.c                | 111 ++++--
 drivers/iommu/riscv/iommu.h                |  48 +++
 drivers/irqchip/irq-msi-lib.c              |   8 +-
 drivers/irqchip/irq-riscv-imsic-platform.c |  27 +-
 drivers/vfio/Kconfig                       |   2 +-
 include/linux/iommu.h                      |  31 ++
 include/linux/irqchip/riscv-imsic.h        |   7 +
 include/linux/irqdomain_defs.h             |   1 +
 tools/testing/selftests/vfio/Makefile      |   2 +-
 23 files changed, 819 insertions(+), 122 deletions(-)
 create mode 100644 drivers/iommu/riscv/iommu-ir.c

-- 
2.43.0

^ permalink raw reply	[flat|nested] 25+ messages in thread
end of thread, other threads:[~2026-08-20 22:09 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-20 21:41 [PATCH v4 00/21] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO Andrew Jones
2026-08-20 21:41 ` [PATCH v4 01/21] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
2026-08-20 21:41 ` [PATCH v4 02/21] iommufd: Add iommufd_sw_map_msi() Andrew Jones
2026-08-20 22:09   ` Jason Gunthorpe
2026-08-20 21:41 ` [PATCH v4 03/21] iommu/dma: Add iommu_dma_sw_map_msi() Andrew Jones
2026-08-20 21:41 ` [PATCH v4 04/21] iommu/dma: Add iommu_dma_map_msi() Andrew Jones
2026-08-20 21:41 ` [PATCH v4 05/21] iommu: Document MSI mapping during domain replacement Andrew Jones
2026-08-20 21:41 ` [PATCH v4 06/21] genirq/msi: Provide DOMAIN_BUS_MSI_REMAP Andrew Jones
2026-08-20 21:41 ` [PATCH v4 07/21] irqchip/riscv-imsic: Compose MSI updates through the hierarchy Andrew Jones
2026-08-20 21:41 ` [PATCH v4 08/21] iommu/riscv: Add IRQ domain for interrupt remapping Andrew Jones
2026-08-20 21:41 ` [PATCH v4 09/21] iommu/riscv: Refresh platform MSI domain before IR setup Andrew Jones
2026-08-20 21:41 ` [PATCH v4 10/21] iommu/riscv: Prepare info->domain for concurrent RCU read access Andrew Jones
2026-08-20 21:41 ` [PATCH v4 11/21] iommu/riscv: Reserve an MSI IOVA window for iommufd Andrew Jones
2026-08-20 21:41 ` [PATCH v4 12/21] iommu/riscv: Pre-map IMSIC MSI targets Andrew Jones
2026-08-20 21:41 ` [PATCH v4 13/21] iommu/riscv: Preserve MSI IOVA state across domain replacement Andrew Jones
2026-08-20 21:52   ` Jason Gunthorpe
2026-08-20 21:41 ` [PATCH v4 14/21] iommu/riscv: Gate direct identity boundary switches with live MSIs Andrew Jones
2026-08-20 21:41 ` [PATCH v4 15/21] iommu/riscv: Remap IMSIC targets during MSI composition Andrew Jones
2026-08-20 21:41 ` [PATCH v4 16/21] iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V Andrew Jones
2026-08-20 21:41 ` [PATCH v4 17/21] iommu/riscv: Report cache coherency capability Andrew Jones
2026-08-20 21:47   ` Jason Gunthorpe
2026-08-20 21:41 ` [PATCH v4 18/21] vfio: enable IOMMU_TYPE1 for RISC-V Andrew Jones
2026-08-20 21:41 ` [PATCH v4 19/21] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Andrew Jones
2026-08-20 21:41 ` [PATCH v4 20/21] riscv: defconfig: Enable IOMMUFD and VFIO Andrew Jones
2026-08-20 21:41 ` [PATCH v4 21/21] selftests/vfio: Allow building on RISC-V Andrew Jones

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