[PATCH] x86/microcode: Fix comment in microcode_loader_disabled()

[PATCH] x86/microcode: Fix comment in microcode_loader_disabled()

[Xiaoyao Li]

The code in microcode_loader_disabled() actually checks for the bit 31
in CPUID[1]:ECX being set. Update the comment to match the code.

No functional change intended.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
 arch/x86/kernel/cpu/microcode/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 651202e6fefb..68a1a893246c 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -126,7 +126,7 @@ bool __init microcode_loader_disabled(void)
 	}
 
 	/*
-	 * 2) Bit 31 in CPUID[1]:ECX is clear
+	 * 2) Bit 31 in CPUID[1]:ECX is set
 	 *    The bit is reserved for hypervisor use. This is still not
 	 *    completely accurate as XEN PV guests don't see that CPUID bit
 	 *    set, but that's good enough as they don't land on the BSP

base-commit: 5d6919055dec134de3c40167a490f33c74c12581
-- 
2.43.0

[tip: x86/microcode] x86/microcode: Fix comment in microcode_loader_disabled()

[tip-bot2 for Xiaoyao Li]

The following commit has been merged into the x86/microcode branch of tip:

Commit-ID:     1458ade7469d7447499d4651abfaee9d4374857f
Gitweb:        https://git.kernel.org/tip/1458ade7469d7447499d4651abfaee9d4374857f
Author:        Xiaoyao Li <xiaoyao.li@intel.com>
AuthorDate:    Tue, 12 May 2026 23:27:54 +08:00
Committer:     Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Tue, 12 May 2026 18:28:04 +02:00

x86/microcode: Fix comment in microcode_loader_disabled()

The code in microcode_loader_disabled() actually checks for the bit 31
in CPUID[1]:ECX being set. Update the comment to match the code.

No functional change intended.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://patch.msgid.link/20260512152754.671760-1-xiaoyao.li@intel.com
---
 arch/x86/kernel/cpu/microcode/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 651202e..68a1a89 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -126,7 +126,7 @@ bool __init microcode_loader_disabled(void)
 	}
 
 	/*
-	 * 2) Bit 31 in CPUID[1]:ECX is clear
+	 * 2) Bit 31 in CPUID[1]:ECX is set
 	 *    The bit is reserved for hypervisor use. This is still not
 	 *    completely accurate as XEN PV guests don't see that CPUID bit
 	 *    set, but that's good enough as they don't land on the BSP

Re: [PATCH] x86/microcode: Fix comment in microcode_loader_disabled()

[Andrew Cooper]

> diff --git a/arch/x86/kernel/cpu/microcode/core.c
> b/arch/x86/kernel/cpu/microcode/core.c index
> 651202e6fefb..68a1a893246c 100644 ---
> a/arch/x86/kernel/cpu/microcode/core.c +++
> b/arch/x86/kernel/cpu/microcode/core.c @@ -126,7 +126,7 @@ bool __init
> microcode_loader_disabled(void)  	}
>  
>  	/*
> - * 2) Bit 31 in CPUID[1]:ECX is clear + * 2) Bit 31 in CPUID[1]:ECX
> is set  	 *    The bit is reserved for hypervisor use. This is still not
>  	 *    completely accurate as XEN PV guests don't see that CPUID bit
>  	 *    set, but that's good enough as they don't land on the BSP

The disposition of that bit isn't the only wrong thing.

That claim wasn't reviewed by anyone from Xen, and I don't even know
what "doesn't land on the BSP" is supposed to mean in context.

On AMD systems, the Hypervisor bit will always be present.  On any Intel
system since IvyBridge, the same is true.

But the logic is buggy and should use regular CPUID not native CPUID.

~Andrew