From: Arnd Bergmann <arnd@arndb.de>
To: Anurup M <anurupvasu@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org,
Tan Xiaojun <tanxiaojun@huawei.com>,
anurup.m@huawei.com, linux-kernel@vger.kernel.org,
mark.rutland@arm.com, shyju.pv@huawei.com,
gabriele.paoloni@huawei.com, john.garry@huawei.com,
will.deacon@arm.com, linuxarm@huawei.com, xuwei5@hisilicon.com,
zhangshaokun@hisilicon.com, sanil.kumar@hisilicon.com,
shiju.jose@huawei.com
Subject: Re: [PATCH v1 03/11] drivers: soc: hisi: Add support for Hisilicon Djtag driver
Date: Tue, 08 Nov 2016 12:43:41 +0100 [thread overview]
Message-ID: <22120038.dbaYpsQoUH@wuerfel> (raw)
In-Reply-To: <582180F7.5060100@gmail.com>
On Tuesday, November 8, 2016 1:08:31 PM CET Anurup M wrote:
> On Tuesday 08 November 2016 12:32 PM, Tan Xiaojun wrote:
> > On 2016/11/7 21:26, Arnd Bergmann wrote:
> >> On Wednesday, November 2, 2016 11:42:46 AM CET Anurup M wrote:
> >>> From: Tan Xiaojun <tanxiaojun@huawei.com>
> >>> + /* ensure the djtag operation is done */
> >>> + do {
> >>> + djtag_read32_relaxed(regs_base, SC_DJTAG_MSTR_START_EN_EX, &rd);
> >>> +
> >>> + if (!(rd & DJTAG_MSTR_START_EN_EX))
> >>> + break;
> >>> +
> >>> + udelay(1);
> >>> + } while (timeout--);
> >> This one is obviously not performance critical at all, so use a non-relaxed
> >> accessor. Same for the other two in this function.
> >>
> >> Are these functions ever called from atomic context? If yes, please document
> >> from what context they can be called, otherwise please consider changing
> >> the udelay calls into sleeping waits.
> >>
> > Yes, this is not reentrant.
> The read/write functions shall also be called from irq handler (for
> handling counter overflow).
> So need to use udelay calls. Shall Document it in v2.
Ok.
> >>> +static const struct of_device_id djtag_of_match[] = {
> >>> + /* for hip05(D02) cpu die */
> >>> + { .compatible = "hisilicon,hip05-cpu-djtag-v1",
> >>> + .data = (void *)djtag_readwrite_v1 },
> >>> + /* for hip05(D02) io die */
> >>> + { .compatible = "hisilicon,hip05-io-djtag-v1",
> >>> + .data = (void *)djtag_readwrite_v1 },
> >>> + /* for hip06(D03) cpu die */
> >>> + { .compatible = "hisilicon,hip06-cpu-djtag-v1",
> >>> + .data = (void *)djtag_readwrite_v1 },
> >>> + /* for hip06(D03) io die */
> >>> + { .compatible = "hisilicon,hip06-io-djtag-v2",
> >>> + .data = (void *)djtag_readwrite_v2 },
> >>> + /* for hip07(D05) cpu die */
> >>> + { .compatible = "hisilicon,hip07-cpu-djtag-v2",
> >>> + .data = (void *)djtag_readwrite_v2 },
> >>> + /* for hip07(D05) io die */
> >>> + { .compatible = "hisilicon,hip07-io-djtag-v2",
> >>> + .data = (void *)djtag_readwrite_v2 },
> >>> + {},
> >>> +};
> >>
> >> If these are backwards compatible, just mark them as compatible in DT,
> >> e.g. hip06 can use
> >>
> >> compatible = "hisilicon,hip06-cpu-djtag-v1", "hisilicon,hip05-cpu-djtag-v1";
> >>
> >> so you can tell the difference if you need to, but the driver only has to
> >> list the oldest one here.
> >>
> >> What is the difference between the cpu and io djtag interfaces?
> On some chips like hip06, the djtag version is different for IO die.
In what way? The driver doesn't seem to care about the difference.
Arnd
next prev parent reply other threads:[~2016-11-08 11:45 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-02 15:42 [PATCH v1 00/11] perf: arm64: Support for Hisilicon SoC Hardware event counters Anurup M
2016-11-02 15:42 ` [PATCH v1 01/11] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support Anurup M
2016-11-02 15:42 ` [PATCH v1 02/11] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Sysctrl and Djtag dts bindings Anurup M
2016-11-02 15:42 ` [PATCH v1 03/11] drivers: soc: hisi: Add support for Hisilicon Djtag driver Anurup M
2016-11-03 1:59 ` kbuild test robot
2016-11-07 13:26 ` Arnd Bergmann
2016-11-07 14:15 ` John Garry
2016-11-07 20:08 ` Arnd Bergmann
2016-11-08 11:23 ` John Garry
2016-11-08 11:45 ` Arnd Bergmann
2016-11-08 13:49 ` John Garry
2016-11-08 15:10 ` Arnd Bergmann
2016-11-08 15:17 ` John Garry
2016-11-09 10:44 ` Anurup M
2016-11-08 15:51 ` Anurup M
2016-11-09 9:06 ` John Garry
2016-11-11 10:35 ` Anurup M
2016-11-08 7:02 ` Tan Xiaojun
2016-11-08 7:38 ` Anurup M
2016-11-08 11:43 ` Arnd Bergmann [this message]
2016-11-08 13:46 ` Anurup M
2016-11-08 15:08 ` Arnd Bergmann
2016-11-09 4:28 ` Anurup M
2016-11-09 21:40 ` Arnd Bergmann
2016-11-11 10:23 ` Anurup M
2016-11-02 15:42 ` [PATCH v1 04/11] Documentation: perf: hisi: Documentation for HIP05/06/07 PMU event counting Anurup M
2016-11-02 15:42 ` [PATCH v1 05/11] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU Anurup M
2016-11-02 15:42 ` [PATCH v1 06/11] perf: hisi: Update Kconfig for Hisilicon PMU support Anurup M
2016-11-02 15:42 ` [PATCH v1 07/11] perf: hisi: Add support for Hisilicon SoC event counters Anurup M
2016-11-02 15:42 ` [PATCH v1 08/11] perf: hisi: Add sysfs attributes for L3 cache(L3C) PMU Anurup M
2016-11-02 15:42 ` [PATCH v1 09/11] perf: hisi: Miscellanous node(MN) event counting in perf Anurup M
2016-11-02 15:42 ` [PATCH v1 10/11] perf: hisi: Support for Hisilicon DDRC PMU Anurup M
2016-11-02 15:42 ` [PATCH v1 11/11] dts: arm64: hip06: Add Hisilicon SoC PMU support Anurup M
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=22120038.dbaYpsQoUH@wuerfel \
--to=arnd@arndb.de \
--cc=anurup.m@huawei.com \
--cc=anurupvasu@gmail.com \
--cc=gabriele.paoloni@huawei.com \
--cc=john.garry@huawei.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=sanil.kumar@hisilicon.com \
--cc=shiju.jose@huawei.com \
--cc=shyju.pv@huawei.com \
--cc=tanxiaojun@huawei.com \
--cc=will.deacon@arm.com \
--cc=xuwei5@hisilicon.com \
--cc=zhangshaokun@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox