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* [PATCH 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode
@ 2026-08-04 11:18 David Oberhollenzer
  2026-08-04 11:18 ` [PATCH 1/2] " David Oberhollenzer
  2026-08-04 11:18 ` [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting David Oberhollenzer
  0 siblings, 2 replies; 6+ messages in thread
From: David Oberhollenzer @ 2026-08-04 11:18 UTC (permalink / raw)
  To: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq
  Cc: Julian.FRIEDRICH, upstream+omap, David Oberhollenzer

This patch set adds a device tree setting to the PIPE3 PHY for
the reference clock selection of the ACSPCIe clock buffer stage.

The clock buffer can operate in either RX mode (clock pins are input,
recover the clock from the bus) or in TX mode (generate the reference
clock for the bus).

This was tested on a board using a phyCORE-AM57x SoM.

David Oberhollenzer (2):
  phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode
  dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting

 .../devicetree/bindings/phy/ti,phy-usb3.yaml  |  9 +++++++
 drivers/phy/ti/phy-ti-pipe3.c                 | 27 +++++++++++++++++++
 2 files changed, 36 insertions(+)

-- 
2.55.0


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode
  2026-08-04 11:18 [PATCH 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
@ 2026-08-04 11:18 ` David Oberhollenzer
  2026-08-04 11:18 ` [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting David Oberhollenzer
  1 sibling, 0 replies; 6+ messages in thread
From: David Oberhollenzer @ 2026-08-04 11:18 UTC (permalink / raw)
  To: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq
  Cc: Julian.FRIEDRICH, upstream+omap, David Oberhollenzer

Besides power control, the PHY control logic in the OMAP PCIe PHY
subsystem has a configurable reference clock selection. It can
either use the ljcb_clkp/ljcb_clkn pin as inputs, recovering the
clock from the bus (RX mode), or generate the reference clock
internally, driving the bus pins as outputs (TX mode).

This patch adds a device tree setting to the PIPE3 PHY, allowing
the syscon node, register offset and RX/TX mode setting to be
attached and set up correctly.

Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
---
 drivers/phy/ti/phy-ti-pipe3.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/drivers/phy/ti/phy-ti-pipe3.c b/drivers/phy/ti/phy-ti-pipe3.c
index b5543b5c674c..801a6239328e 100644
--- a/drivers/phy/ti/phy-ti-pipe3.c
+++ b/drivers/phy/ti/phy-ti-pipe3.c
@@ -115,6 +115,9 @@
 #define MEM_CDR_LOS_SOURCE_MASK		GENMASK(10, 9)
 #define MEM_CDR_LOS_SOURCE_SHIFT	9
 
+#define PCIE_TX_RX_CTRL_MASK		GENMASK(17, 16)
+#define PCIE_TX_RX_CTRL_SHIFT		16
+
 /*
  * This is an Empirical value that works, need to confirm the actual
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -785,6 +788,24 @@ static int ti_pipe3_get_pll_base(struct ti_pipe3 *phy)
 	return PTR_ERR_OR_ZERO(phy->pll_ctrl_base);
 }
 
+static int ti_pipe3_acspcie_tx_rx_mode(struct ti_pipe3 *phy)
+{
+	struct device_node *np = phy->dev->of_node;
+	struct regmap *regmap;
+	unsigned int args[2];
+
+	regmap = syscon_regmap_lookup_by_phandle_args(np,
+						      "syscon-acspcie-tx-rx",
+						      2, args);
+	if (IS_ERR(regmap)) {
+		dev_warn(phy->dev, "can't get syscon-acspcie-tx-rx\n");
+		return -EINVAL;
+	}
+
+	return regmap_update_bits(regmap, args[0], PCIE_TX_RX_CTRL_MASK,
+				  args[1] << PCIE_TX_RX_CTRL_SHIFT);
+}
+
 static int ti_pipe3_probe(struct platform_device *pdev)
 {
 	struct ti_pipe3 *phy;
@@ -807,6 +828,12 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 	phy->dpll_map = data->dpll_map;
 	phy->settings = data->settings;
 
+	if (phy->mode == PIPE3_MODE_PCIE) {
+		ret = ti_pipe3_acspcie_tx_rx_mode(phy);
+		if (ret)
+			dev_warn(dev, "failed to set ACSPCIe TX/RX mode\n");
+	}
+
 	ret = ti_pipe3_get_pll_base(phy);
 	if (ret)
 		return ret;
-- 
2.55.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting
  2026-08-04 11:18 [PATCH 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
  2026-08-04 11:18 ` [PATCH 1/2] " David Oberhollenzer
@ 2026-08-04 11:18 ` David Oberhollenzer
  2026-08-05  7:39   ` Krzysztof Kozlowski
  1 sibling, 1 reply; 6+ messages in thread
From: David Oberhollenzer @ 2026-08-04 11:18 UTC (permalink / raw)
  To: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq
  Cc: Julian.FRIEDRICH, upstream+omap, David Oberhollenzer

Add syscon-acspcie-tx-rx property to the PHY bindings.

Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
---
 Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
index 84f538aa587c..4fb017df2898 100644
--- a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
+++ b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
@@ -52,6 +52,15 @@ properties:
       enum: [wkupclk, sysclk, refclk, dpll_ref,
              dpll_ref_m2, phy-div, div-clk]
 
+  syscon-acspcie-tx-rx:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+    items:
+      items:
+        - description: Phandle to the system control module
+        - description: Register offset of CTRL_CORE_SMA_SW_6
+        - description: Setting for PCIE_TX_RX_CONTROL
+
   syscon-phy-power:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
-- 
2.55.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting
  2026-08-04 11:18 ` [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting David Oberhollenzer
@ 2026-08-05  7:39   ` Krzysztof Kozlowski
  2026-08-05  8:42     ` David Oberhollenzer
  0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2026-08-05  7:39 UTC (permalink / raw)
  To: David Oberhollenzer
  Cc: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq, Julian.FRIEDRICH, upstream+omap

On Tue, Aug 04, 2026 at 01:18:49PM +0200, David Oberhollenzer wrote:
> Add syscon-acspcie-tx-rx property to the PHY bindings.

Why? Actually better to explain WHY in the property description.

> 
> Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> ---
>  Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
> index 84f538aa587c..4fb017df2898 100644
> --- a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
> +++ b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
> @@ -52,6 +52,15 @@ properties:
>        enum: [wkupclk, sysclk, refclk, dpll_ref,
>               dpll_ref_m2, phy-div, div-clk]
>  
> +  syscon-acspcie-tx-rx:

Please organize the patch documenting the compatible (DT bindings)
before the patch using that compatible.
See also: https://elixir.bootlin.com/linux/v6.14-rc6/source/Documentation/devicetree/bindings/submitting-patches.rst#L46

Not a valid naming, missing vendor prefix and syscon looks like
Linuxism, since you called it "system control module".

> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    maxItems: 1
> +    items:
> +      items:

Missing -

Also, update the example.

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting
  2026-08-05  7:39   ` Krzysztof Kozlowski
@ 2026-08-05  8:42     ` David Oberhollenzer
  2026-08-05  9:47       ` Krzysztof Kozlowski
  0 siblings, 1 reply; 6+ messages in thread
From: David Oberhollenzer @ 2026-08-05  8:42 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq, Julian.FRIEDRICH, upstream+omap

Hi,

On 8/5/26 9:39 AM, Krzysztof Kozlowski wrote:
> 
> Not a valid naming, missing vendor prefix and syscon looks like
> Linuxism, since you called it "system control module".
> 

I agree that this is a very vendor specific kluge and I suspected
it might need a vendor prefix. However, I ultimately tried to stick
to existing conventions.

There are 3 more syscon properties defined for this device:
  - syscon-phy-power
  - syscon-pllreset
  - syscon-pcs

None of them have a vendor prefix, all of them use the
description "system control module".

I take it, the existing properties already break best practices
that were established later? Or is there another reason they
lack a vendor prefix?

>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>> +    maxItems: 1
>> +    items:
>> +      items:
> 
> Missing -
> 
Likewise, I simply copied from the syscon blocks and made some
minor changes. Hence also the identical description. So this is
broken for the existing properties as well?

Thanks,

David


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting
  2026-08-05  8:42     ` David Oberhollenzer
@ 2026-08-05  9:47       ` Krzysztof Kozlowski
  0 siblings, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2026-08-05  9:47 UTC (permalink / raw)
  To: David Oberhollenzer
  Cc: linux-phy, devicetree, linux-kernel, vkoul, neil.armstrong, robh,
	krzk+dt, conor+dt, johan, rogerq, Julian.FRIEDRICH, upstream+omap

On 05/08/2026 10:42, David Oberhollenzer wrote:
> Hi,
> 
> On 8/5/26 9:39 AM, Krzysztof Kozlowski wrote:
>>
>> Not a valid naming, missing vendor prefix and syscon looks like
>> Linuxism, since you called it "system control module".
>>
> 
> I agree that this is a very vendor specific kluge and I suspected
> it might need a vendor prefix. However, I ultimately tried to stick
> to existing conventions.
> 
> There are 3 more syscon properties defined for this device:
>   - syscon-phy-power
>   - syscon-pllreset
>   - syscon-pcs

These, as the rest of the binding come, from 2015 or even earlier. A lot
changed during that time. It is a good idea to take recently reviewed
code as an example. It is a bad idea to take 10 yo code.

> 
> None of them have a vendor prefix, all of them use the
> description "system control module".
> 
> I take it, the existing properties already break best practices
> that were established later? Or is there another reason they
> lack a vendor prefix?

Just add vendor prefix to the new property.

> 
>>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>>> +    maxItems: 1
>>> +    items:
>>> +      items:
>>
>> Missing -
>>
> Likewise, I simply copied from the syscon blocks and made some
> minor changes. Hence also the identical description. So this is
> broken for the existing properties as well?

Hm, you are right, the syntax was actually correct. I missed maxItems.

Preferred syntax is for example in
Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml, but
your code was fine as well.



Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-08-05  9:47 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-04 11:18 [PATCH 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
2026-08-04 11:18 ` [PATCH 1/2] " David Oberhollenzer
2026-08-04 11:18 ` [PATCH 2/2] dt-bindings: phy: ti,phy-usb3: document aspcie reference clock setting David Oberhollenzer
2026-08-05  7:39   ` Krzysztof Kozlowski
2026-08-05  8:42     ` David Oberhollenzer
2026-08-05  9:47       ` Krzysztof Kozlowski

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