Posted Write onto a PCI end point device using Linux

Posted Write onto a PCI end point device using Linux

[Sanka Piyaratna]

Hi,


I am wondering whether it is possible to issue a posted write using the host 
computer's root complex towards an PCI express end point. I have done this using 

DMA in the past. However, if posted writes are possible that would save a lot of 

time and effort and would be quicker too.

Thanks,
Sanka


      

Re: Posted Write onto a PCI end point device using Linux

[Robert Hancock]

On 12/07/2010 05:29 AM, Sanka Piyaratna wrote:
> Hi,
>
>
> I am wondering whether it is possible to issue a posted write using the host
> computer's root complex towards an PCI express end point. I have done this using
>
> DMA in the past. However, if posted writes are possible that would save a lot of
>
> time and effort and would be quicker too.

Writes from the CPU to PCI memory are always posted. However, the posted 
write buffer size is usually quite limited and so this probably will 
still cause CPU overhead when writing any significant amount of data 
this way.

Re: Posted Write onto a PCI end point device using Linux

[Robert Hancock]

On Tue, Dec 7, 2010 at 9:57 PM, Sanka Piyaratna <cesanka@yahoo.com> wrote:
> Hi Robert,
> Could you please tell me how I can initiate a posted write towards a PCIe
> endpoint with larger than 32 bit payload using Linux?
> Thanks and regards,

You can try writeq to get a 64-bit payload, but I don't think it's
available on all platforms. In particular with a 32-bit CPU, it may
not be possible at all. If you need to send bigger payloads then you
need to use DMA.

>
> Sanka Piyaratna
>
> ________________________________
> From: Robert Hancock <hancockrwd@gmail.com>
> To: Sanka Piyaratna <cesanka@yahoo.com>
> Cc: linux-kernel@vger.kernel.org
> Sent: Wed, 8 December, 2010 12:16:54 PM
> Subject: Re: Posted Write onto a PCI end point device using Linux
>
> On 12/07/2010 05:29 AM, Sanka Piyaratna wrote:
>> Hi,
>>
>>
>> I am wondering whether it is possible to issue a posted write using the
>> host
>> computer's root complex towards an PCI express end point. I have done this
>> using
>>
>> DMA in the past. However, if posted writes are possible that would save a
>> lot of
>>
>> time and effort and would be quicker too.
>
> Writes from the CPU to PCI memory are always posted. However, the posted
> write buffer size is usually quite limited and so this probably will
> still cause CPU overhead when writing any significant amount of data
> this way.
>
>

Re: Posted Write onto a PCI end point device using Linux

[Sanka Piyaratna]

Thanks for that Robert. When you say DMA, this has to be implemented at the 
endpoint device doesn't it? There is no DMA mode on the CPU for doing this is 
there?

 Sanka Piyaratna




________________________________
From: Robert Hancock <hancockrwd@gmail.com>
To: Sanka Piyaratna <cesanka@yahoo.com>
Cc: linux-kernel@vger.kernel.org
Sent: Wed, 8 December, 2010 3:25:47 PM
Subject: Re: Posted Write onto a PCI end point device using Linux

On Tue, Dec 7, 2010 at 9:57 PM, Sanka Piyaratna <cesanka@yahoo.com> wrote:
> Hi Robert,
> Could you please tell me how I can initiate a posted write towards a PCIe
> endpoint with larger than 32 bit payload using Linux?
> Thanks and regards,

You can try writeq to get a 64-bit payload, but I don't think it's
available on all platforms. In particular with a 32-bit CPU, it may
not be possible at all. If you need to send bigger payloads then you
need to use DMA.

>
> Sanka Piyaratna
>
> ________________________________
> From: Robert Hancock <hancockrwd@gmail.com>
> To: Sanka Piyaratna <cesanka@yahoo.com>
> Cc: linux-kernel@vger.kernel.org
> Sent: Wed, 8 December, 2010 12:16:54 PM
> Subject: Re: Posted Write onto a PCI end point device using Linux
>
> On 12/07/2010 05:29 AM, Sanka Piyaratna wrote:
>> Hi,
>>
>>
>> I am wondering whether it is possible to issue a posted write using the
>> host
>> computer's root complex towards an PCI express end point. I have done this
>> using
>>
>> DMA in the past. However, if posted writes are possible that would save a
>> lot of
>>
>> time and effort and would be quicker too.
>
> Writes from the CPU to PCI memory are always posted. However, the posted
> write buffer size is usually quite limited and so this probably will
> still cause CPU overhead when writing any significant amount of data
> this way.
>
>



      

Re: Posted Write onto a PCI end point device using Linux

[Robert Hancock]

On Wed, Dec 8, 2010 at 12:05 AM, Sanka Piyaratna <cesanka@yahoo.com> wrote:
> Thanks for that Robert. When you say DMA, this has to be implemented at the
> endpoint device doesn't it? There is no DMA mode on the CPU for doing this is
> there?

No, there's not (on typical hardware, anyway).

>
>  Sanka Piyaratna
>
>
>
>
> ________________________________
> From: Robert Hancock <hancockrwd@gmail.com>
> To: Sanka Piyaratna <cesanka@yahoo.com>
> Cc: linux-kernel@vger.kernel.org
> Sent: Wed, 8 December, 2010 3:25:47 PM
> Subject: Re: Posted Write onto a PCI end point device using Linux
>
> On Tue, Dec 7, 2010 at 9:57 PM, Sanka Piyaratna <cesanka@yahoo.com> wrote:
>> Hi Robert,
>> Could you please tell me how I can initiate a posted write towards a PCIe
>> endpoint with larger than 32 bit payload using Linux?
>> Thanks and regards,
>
> You can try writeq to get a 64-bit payload, but I don't think it's
> available on all platforms. In particular with a 32-bit CPU, it may
> not be possible at all. If you need to send bigger payloads then you
> need to use DMA.
>
>>
>> Sanka Piyaratna
>>
>> ________________________________
>> From: Robert Hancock <hancockrwd@gmail.com>
>> To: Sanka Piyaratna <cesanka@yahoo.com>
>> Cc: linux-kernel@vger.kernel.org
>> Sent: Wed, 8 December, 2010 12:16:54 PM
>> Subject: Re: Posted Write onto a PCI end point device using Linux
>>
>> On 12/07/2010 05:29 AM, Sanka Piyaratna wrote:
>>> Hi,
>>>
>>>
>>> I am wondering whether it is possible to issue a posted write using the
>>> host
>>> computer's root complex towards an PCI express end point. I have done this
>>> using
>>>
>>> DMA in the past. However, if posted writes are possible that would save a
>>> lot of
>>>
>>> time and effort and would be quicker too.
>>
>> Writes from the CPU to PCI memory are always posted. However, the posted
>> write buffer size is usually quite limited and so this probably will
>> still cause CPU overhead when writing any significant amount of data
>> this way.
>>
>>
>
>
>
>
>