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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Jianhua Lin <jianhua.lin@mediatek.com>,
	mchehab@kernel.org, matthias.bgg@gmail.com
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH 1/1] media: mediatek: jpeg: fix buffer alignment
Date: Tue, 22 Apr 2025 16:37:50 +0200	[thread overview]
Message-ID: <28e3f91f-a786-4ec6-ae70-bd92c11be81a@collabora.com> (raw)
In-Reply-To: <20250418032559.31043-1-jianhua.lin@mediatek.com>

Il 18/04/25 05:25, Jianhua Lin ha scritto:
> From: "jianhua.lin" <jianhua.lin@mediatek.com>
> 
> The JPEG encoder image stride register must be MCU aligned.
> For YUV422, it's 32-byte aligned, and for YUV420, it's
> 16-byte aligned.
> 
> The minimal DCT block size is 8x8, so the vertical buffer
> alignment for YUV422 is 8-byte aligned, and for YUV420,
> it's 16-byte aligned.
> 
> Signed-off-by: jianhua.lin <jianhua.lin@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>



      reply	other threads:[~2025-04-22 14:37 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-18  3:25 [PATCH 1/1] media: mediatek: jpeg: fix buffer alignment Jianhua Lin
2025-04-22 14:37 ` AngeloGioacchino Del Regno [this message]

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