* [PATCH 1/1] media: mediatek: jpeg: fix buffer alignment
@ 2025-04-18 3:25 Jianhua Lin
2025-04-22 14:37 ` AngeloGioacchino Del Regno
0 siblings, 1 reply; 2+ messages in thread
From: Jianhua Lin @ 2025-04-18 3:25 UTC (permalink / raw)
To: mchehab, matthias.bgg, angelogioacchino.delregno
Cc: linux-kernel, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, jianhua.lin
From: "jianhua.lin" <jianhua.lin@mediatek.com>
The JPEG encoder image stride register must be MCU aligned.
For YUV422, it's 32-byte aligned, and for YUV420, it's
16-byte aligned.
The minimal DCT block size is 8x8, so the vertical buffer
alignment for YUV422 is 8-byte aligned, and for YUV420,
it's 16-byte aligned.
Signed-off-by: jianhua.lin <jianhua.lin@mediatek.com>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 24 +++++++++----------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 834d2a354692..7dd652e5b6d4 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -40,8 +40,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_enc_formats[] = {
.h_sample = {4, 4},
.v_sample = {4, 2},
.colplanes = 2,
- .h_align = 4,
- .v_align = 4,
+ .h_align = 16,
+ .v_align = 16,
.flags = MTK_JPEG_FMT_FLAG_OUTPUT,
},
{
@@ -50,8 +50,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_enc_formats[] = {
.h_sample = {4, 4},
.v_sample = {4, 2},
.colplanes = 2,
- .h_align = 4,
- .v_align = 4,
+ .h_align = 16,
+ .v_align = 16,
.flags = MTK_JPEG_FMT_FLAG_OUTPUT,
},
{
@@ -60,8 +60,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_enc_formats[] = {
.h_sample = {8},
.v_sample = {4},
.colplanes = 1,
- .h_align = 5,
- .v_align = 3,
+ .h_align = 32,
+ .v_align = 8,
.flags = MTK_JPEG_FMT_FLAG_OUTPUT,
},
{
@@ -70,8 +70,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_enc_formats[] = {
.h_sample = {8},
.v_sample = {4},
.colplanes = 1,
- .h_align = 5,
- .v_align = 3,
+ .h_align = 32,
+ .v_align = 8,
.flags = MTK_JPEG_FMT_FLAG_OUTPUT,
},
};
@@ -87,8 +87,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_dec_formats[] = {
.h_sample = {4, 2, 2},
.v_sample = {4, 2, 2},
.colplanes = 3,
- .h_align = 5,
- .v_align = 4,
+ .h_align = 16,
+ .v_align = 16,
.flags = MTK_JPEG_FMT_FLAG_CAPTURE,
},
{
@@ -96,8 +96,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_dec_formats[] = {
.h_sample = {4, 2, 2},
.v_sample = {4, 4, 4},
.colplanes = 3,
- .h_align = 5,
- .v_align = 3,
+ .h_align = 32,
+ .v_align = 8,
.flags = MTK_JPEG_FMT_FLAG_CAPTURE,
},
};
--
2.46.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/1] media: mediatek: jpeg: fix buffer alignment
2025-04-18 3:25 [PATCH 1/1] media: mediatek: jpeg: fix buffer alignment Jianhua Lin
@ 2025-04-22 14:37 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 2+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-04-22 14:37 UTC (permalink / raw)
To: Jianhua Lin, mchehab, matthias.bgg
Cc: linux-kernel, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group
Il 18/04/25 05:25, Jianhua Lin ha scritto:
> From: "jianhua.lin" <jianhua.lin@mediatek.com>
>
> The JPEG encoder image stride register must be MCU aligned.
> For YUV422, it's 32-byte aligned, and for YUV420, it's
> 16-byte aligned.
>
> The minimal DCT block size is 8x8, so the vertical buffer
> alignment for YUV422 is 8-byte aligned, and for YUV420,
> it's 16-byte aligned.
>
> Signed-off-by: jianhua.lin <jianhua.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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