From: Dave Hansen <dave.hansen@intel.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: bp@alien8.de, dave.hansen@linux.intel.com, kernel-team@meta.com,
linux-kernel@vger.kernel.org, luto@kernel.org, mingo@redhat.com,
riel@surriel.com, tglx@kernel.org, x86@kernel.org, xin@zytor.com
Subject: Re: [PATCH] x86/entry: Read CR2 in asm entry stub to redcue NMI clobbering window
Date: Thu, 14 May 2026 12:55:45 -0700 [thread overview]
Message-ID: <34cb5030-c62a-404b-b801-972840bb230b@intel.com> (raw)
In-Reply-To: <c1a61b27-8f33-44b4-84f6-e7256c1b5bdc@citrix.com>
On 5/14/26 12:49, Andrew Cooper wrote:
> Really, the NMI handler needs to preserve the registers it potentially
> clobbers, and that still requires the NMI handler doing it in assembly
> before entering C.
Yup, totally agree.
It's not rocket science, and it's what we do for CR3 because of PTI, but
it's also no fun. So I didn't want to suggest it.
I mean, we've lived with this behavior _forever_, right? So how bad
could it be?
next prev parent reply other threads:[~2026-05-14 19:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-13 16:12 [PATCH] x86/entry: Read CR2 in asm entry stub to redcue NMI clobbering window Rik van Riel
2026-05-13 16:31 ` Dave Hansen
2026-05-13 16:43 ` Rik van Riel
2026-05-13 17:12 ` Dave Hansen
2026-05-14 19:49 ` Andrew Cooper
2026-05-14 19:55 ` Dave Hansen [this message]
2026-05-14 18:09 ` kernel test robot
2026-05-14 22:54 ` kernel test robot
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