From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Nicolas Dufresne <nicolas.dufresne@collabora.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Detlev Casanova <detlev.casanova@collabora.com>
Cc: kernel@collabora.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: Fix vdec register blocks order on RK3576
Date: Mon, 23 Feb 2026 19:19:37 +0200 [thread overview]
Message-ID: <39f493a6-fd98-4cf6-9991-334ab4ddbbf8@collabora.com> (raw)
In-Reply-To: <edbf38b34e98ee039f45faab5aa5b00a585799ce.camel@collabora.com>
Hi Nicolas,
On 2/23/26 4:51 PM, Nicolas Dufresne wrote:
> Hi Cristian,
>
> Le lundi 23 février 2026 à 14:25 +0200, Cristian Ciocaltea a écrit :
>> When building device trees for the RK3576 based boards, DTC shows the
>> following complaint:
>>
>> rk3576.dtsi:1282.30-1304.5: Warning (simple_bus_reg):
>> /soc/video-codec@27b00000: simple-bus unit address format error, expected
>> "27b00100"
>>
>> Provide the register blocks in the expected address-based order.
>>
>> Fixes: da0de806d8b4 ("arm64: dts: rockchip: Add the vdpu383 Video Decoder on
>> rk3576")
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
>> ---
>> arch/arm64/boot/dts/rockchip/rk3576.dtsi | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> index 49ccdf12ef7e..45eb0d053a6f 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> @@ -1281,10 +1281,10 @@ gpu: gpu@27800000 {
>>
>> vdec: video-codec@27b00000 {
>> compatible = "rockchip,rk3576-vdec";
>> - reg = <0x0 0x27b00100 0x0 0x500>,
>> - <0x0 0x27b00000 0x0 0x100>,
>> + reg = <0x0 0x27b00000 0x0 0x100>,
>> + <0x0 0x27b00100 0x0 0x500>,
>> <0x0 0x27b00600 0x0 0x100>;
>> - reg-names = "function", "link", "cache";
>> + reg-names = "link", "function", "cache";
>
> I have a vague memory it was done on purpose, due to the "items" in the bindings
> requiring to follow the same order. I was not enable to run the DT checks today
> (some pythonic version miss-match issue), but wanted to raise the flag.
As I mentioned in my previous reply, I think we should change the binding to
allow using the correct order.
Thanks,
cristian
prev parent reply other threads:[~2026-02-23 17:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-23 12:25 [PATCH] arm64: dts: rockchip: Fix vdec register blocks order on RK3576 Cristian Ciocaltea
2026-02-23 14:31 ` Sebastian Reichel
2026-02-23 14:39 ` Diederik de Haas
2026-02-23 17:07 ` Cristian Ciocaltea
2026-02-23 18:08 ` Nicolas Dufresne
2026-02-23 18:21 ` Sebastian Reichel
2026-02-23 18:29 ` Cristian Ciocaltea
2026-02-23 20:02 ` Cristian Ciocaltea
2026-02-23 14:51 ` Nicolas Dufresne
2026-02-23 17:19 ` Cristian Ciocaltea [this message]
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