From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Cong Zhang <quic_congzhan@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@quicinc.com
Subject: Re: [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
Date: Tue, 4 Jun 2024 13:57:50 +0200 [thread overview]
Message-ID: <4064c207-bf98-4bb9-b3bb-e291f2e95f8d@linaro.org> (raw)
In-Reply-To: <20240604085929.49227-1-quic_congzhan@quicinc.com>
On 6/4/24 10:59, Cong Zhang wrote:
> The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
> number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
> of EL2 non-secure physical timer should be 10 (26 - 16).
>
> Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
> Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
> ---
Seems to match other qcom platforms of the timeframe too..
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
next prev parent reply other threads:[~2024-06-04 11:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-04 8:59 [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
2024-06-04 9:08 ` Krzysztof Kozlowski
2024-06-04 11:57 ` Konrad Dybcio [this message]
2024-06-04 20:11 ` Bjorn Andersson
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