Re: [PATCH] Lattice ECP3 FPGA: Correct endianness

[Stefan Roese <sr@denx.de>]

On 03.07.2014 17:54, Jean-Michel Hautbois wrote:
> This patch corrects three big/little endian issues. Tested on i.MX6.
> 
> From: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>
> Date: Thu, 3 Jul 2014 17:49:47 +0200
> Subject: [PATCH] Endianness corrections
> 
> ---
>   drivers/misc/lattice-ecp3-config.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/misc/lattice-ecp3-config.c
> b/drivers/misc/lattice-ecp3-config.c
> index bb26f08..23d5c01 100644
> --- a/drivers/misc/lattice-ecp3-config.c
> +++ b/drivers/misc/lattice-ecp3-config.c
> @@ -93,7 +93,7 @@ static void firmware_load(const struct firmware *fw,
> void *context)
>       txbuf[0] = FPGA_CMD_READ_ID;
>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>       dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", *(u32 *)&rxbuf[4]);
> -    jedec_id = *(u32 *)&rxbuf[4];
> +    jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);
> 
>       for (i = 0; i < ARRAY_SIZE(ecp3_dev); i++) {
>           if (jedec_id == ecp3_dev[i].jedec_id)
> @@ -142,7 +142,7 @@ static void firmware_load(const struct firmware
> *fw, void *context)
>       for (i = 0; i < FPGA_CLEAR_LOOP_COUNT; i++) {
>           txbuf[0] = FPGA_CMD_READ_STATUS;
>           ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> -        status = *(u32 *)&rxbuf[4];
> +        status = be32_to_cpu(*(u32 *)&rxbuf[4]);
>           if (status == FPGA_STATUS_CLEARED)
>               break;
> 
> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> *fw, void *context)
> 
>       txbuf[0] = FPGA_CMD_READ_STATUS;
>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> -    status = *(u32 *)&rxbuf[4];
> +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);

I know you didn't introduce this, but this re-ordering does look better:

+    status = be32_to_cpu(*(u32 *)&rxbuf[4]);
+    dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);

Other than that:

Acked-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan