Re: [PATCH] Lattice ECP3 FPGA: Correct endianness

[Stefan Roese <sr@denx.de>]

On 04.07.2014 15:11, Jean-Michel Hautbois wrote:
> 2014-07-03 18:12 GMT+02:00 Joe Perches <joe@perches.com>:
>> trivial:
>>
>>> diff --git a/drivers/misc/lattice-ecp3-config.c
>> []
>>> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
>>> *fw, void *context)
>>>
>>>       txbuf[0] = FPGA_CMD_READ_STATUS;
>>>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>>> -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
>>> -    status = *(u32 *)&rxbuf[4];
>>> +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
>>> +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);
>>
>> This should emit a sparse error.
>> It'd be simpler as:
>>
>>          status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
>>          dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);
>>
>>
>
> OK, do you want me to send a new patch including this modification ?

Yes. Please send a v2 patch version. You can add my "Acked-by:.." to the 
new version.

Thanks,
Stefan