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* [PATCH] Lattice ECP3 FPGA: Correct endianness
@ 2014-07-03 15:54 Jean-Michel Hautbois
  2014-07-03 15:59 ` Stefan Roese
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Jean-Michel Hautbois @ 2014-07-03 15:54 UTC (permalink / raw)
  To: linux-kernel; +Cc: sr

This patch corrects three big/little endian issues. Tested on i.MX6.

From: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>
Date: Thu, 3 Jul 2014 17:49:47 +0200
Subject: [PATCH] Endianness corrections

---
 drivers/misc/lattice-ecp3-config.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/lattice-ecp3-config.c
b/drivers/misc/lattice-ecp3-config.c
index bb26f08..23d5c01 100644
--- a/drivers/misc/lattice-ecp3-config.c
+++ b/drivers/misc/lattice-ecp3-config.c
@@ -93,7 +93,7 @@ static void firmware_load(const struct firmware *fw,
void *context)
     txbuf[0] = FPGA_CMD_READ_ID;
     ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
     dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", *(u32 *)&rxbuf[4]);
-    jedec_id = *(u32 *)&rxbuf[4];
+    jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);

     for (i = 0; i < ARRAY_SIZE(ecp3_dev); i++) {
         if (jedec_id == ecp3_dev[i].jedec_id)
@@ -142,7 +142,7 @@ static void firmware_load(const struct firmware
*fw, void *context)
     for (i = 0; i < FPGA_CLEAR_LOOP_COUNT; i++) {
         txbuf[0] = FPGA_CMD_READ_STATUS;
         ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
-        status = *(u32 *)&rxbuf[4];
+        status = be32_to_cpu(*(u32 *)&rxbuf[4]);
         if (status == FPGA_STATUS_CLEARED)
             break;

@@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
*fw, void *context)

     txbuf[0] = FPGA_CMD_READ_STATUS;
     ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
-    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
-    status = *(u32 *)&rxbuf[4];
+    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
+    status = be32_to_cpu(*(u32 *)&rxbuf[4]);

     /* Check result */
     if (status & FPGA_STATUS_DONE)
-- 
2.0.0

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-03 15:54 [PATCH] Lattice ECP3 FPGA: Correct endianness Jean-Michel Hautbois
@ 2014-07-03 15:59 ` Stefan Roese
  2014-07-03 16:12 ` Joe Perches
  2014-07-04 14:58 ` Geert Uytterhoeven
  2 siblings, 0 replies; 7+ messages in thread
From: Stefan Roese @ 2014-07-03 15:59 UTC (permalink / raw)
  To: Jean-Michel Hautbois, linux-kernel

On 03.07.2014 17:54, Jean-Michel Hautbois wrote:
> This patch corrects three big/little endian issues. Tested on i.MX6.
> 
> From: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>
> Date: Thu, 3 Jul 2014 17:49:47 +0200
> Subject: [PATCH] Endianness corrections
> 
> ---
>   drivers/misc/lattice-ecp3-config.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/misc/lattice-ecp3-config.c
> b/drivers/misc/lattice-ecp3-config.c
> index bb26f08..23d5c01 100644
> --- a/drivers/misc/lattice-ecp3-config.c
> +++ b/drivers/misc/lattice-ecp3-config.c
> @@ -93,7 +93,7 @@ static void firmware_load(const struct firmware *fw,
> void *context)
>       txbuf[0] = FPGA_CMD_READ_ID;
>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>       dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", *(u32 *)&rxbuf[4]);
> -    jedec_id = *(u32 *)&rxbuf[4];
> +    jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);
> 
>       for (i = 0; i < ARRAY_SIZE(ecp3_dev); i++) {
>           if (jedec_id == ecp3_dev[i].jedec_id)
> @@ -142,7 +142,7 @@ static void firmware_load(const struct firmware
> *fw, void *context)
>       for (i = 0; i < FPGA_CLEAR_LOOP_COUNT; i++) {
>           txbuf[0] = FPGA_CMD_READ_STATUS;
>           ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> -        status = *(u32 *)&rxbuf[4];
> +        status = be32_to_cpu(*(u32 *)&rxbuf[4]);
>           if (status == FPGA_STATUS_CLEARED)
>               break;
> 
> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> *fw, void *context)
> 
>       txbuf[0] = FPGA_CMD_READ_STATUS;
>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> -    status = *(u32 *)&rxbuf[4];
> +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);

I know you didn't introduce this, but this re-ordering does look better:

+    status = be32_to_cpu(*(u32 *)&rxbuf[4]);
+    dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);

Other than that:

Acked-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-03 15:54 [PATCH] Lattice ECP3 FPGA: Correct endianness Jean-Michel Hautbois
  2014-07-03 15:59 ` Stefan Roese
@ 2014-07-03 16:12 ` Joe Perches
  2014-07-04 13:11   ` Jean-Michel Hautbois
  2014-07-04 14:58 ` Geert Uytterhoeven
  2 siblings, 1 reply; 7+ messages in thread
From: Joe Perches @ 2014-07-03 16:12 UTC (permalink / raw)
  To: Jean-Michel Hautbois; +Cc: linux-kernel, sr

On Thu, 2014-07-03 at 17:54 +0200, Jean-Michel Hautbois wrote:
> This patch corrects three big/little endian issues. Tested on i.MX6.

trivial:

> diff --git a/drivers/misc/lattice-ecp3-config.c
[]
> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> *fw, void *context)
> 
>      txbuf[0] = FPGA_CMD_READ_STATUS;
>      ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> -    status = *(u32 *)&rxbuf[4];
> +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);

This should emit a sparse error.
It'd be simpler as:

	status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
	dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);



^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-03 16:12 ` Joe Perches
@ 2014-07-04 13:11   ` Jean-Michel Hautbois
  2014-07-04 13:14     ` Stefan Roese
  0 siblings, 1 reply; 7+ messages in thread
From: Jean-Michel Hautbois @ 2014-07-04 13:11 UTC (permalink / raw)
  To: Joe Perches; +Cc: linux-kernel, sr

2014-07-03 18:12 GMT+02:00 Joe Perches <joe@perches.com>:
>
> On Thu, 2014-07-03 at 17:54 +0200, Jean-Michel Hautbois wrote:
> > This patch corrects three big/little endian issues. Tested on i.MX6.
>
> trivial:
>
> > diff --git a/drivers/misc/lattice-ecp3-config.c
> []
> > @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> > *fw, void *context)
> >
> >      txbuf[0] = FPGA_CMD_READ_STATUS;
> >      ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> > -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> > -    status = *(u32 *)&rxbuf[4];
> > +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> > +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);
>
> This should emit a sparse error.
> It'd be simpler as:
>
>         status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
>         dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);
>
>

OK, do you want me to send a new patch including this modification ?


JM

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-04 13:11   ` Jean-Michel Hautbois
@ 2014-07-04 13:14     ` Stefan Roese
  0 siblings, 0 replies; 7+ messages in thread
From: Stefan Roese @ 2014-07-04 13:14 UTC (permalink / raw)
  To: Jean-Michel Hautbois; +Cc: Joe Perches, linux-kernel

On 04.07.2014 15:11, Jean-Michel Hautbois wrote:
> 2014-07-03 18:12 GMT+02:00 Joe Perches <joe@perches.com>:
>> trivial:
>>
>>> diff --git a/drivers/misc/lattice-ecp3-config.c
>> []
>>> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
>>> *fw, void *context)
>>>
>>>       txbuf[0] = FPGA_CMD_READ_STATUS;
>>>       ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>>> -    dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
>>> -    status = *(u32 *)&rxbuf[4];
>>> +    dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
>>> +    status = be32_to_cpu(*(u32 *)&rxbuf[4]);
>>
>> This should emit a sparse error.
>> It'd be simpler as:
>>
>>          status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
>>          dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);
>>
>>
>
> OK, do you want me to send a new patch including this modification ?

Yes. Please send a v2 patch version. You can add my "Acked-by:.." to the 
new version.

Thanks,
Stefan


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-03 15:54 [PATCH] Lattice ECP3 FPGA: Correct endianness Jean-Michel Hautbois
  2014-07-03 15:59 ` Stefan Roese
  2014-07-03 16:12 ` Joe Perches
@ 2014-07-04 14:58 ` Geert Uytterhoeven
  2014-07-04 15:16   ` Jean-Michel Hautbois
  2 siblings, 1 reply; 7+ messages in thread
From: Geert Uytterhoeven @ 2014-07-04 14:58 UTC (permalink / raw)
  To: Jean-Michel Hautbois; +Cc: linux-kernel, sr

On Thu, Jul 3, 2014 at 5:54 PM, Jean-Michel Hautbois
<jean-michel.hautbois@vodalys.com> wrote:
> --- a/drivers/misc/lattice-ecp3-config.c
> +++ b/drivers/misc/lattice-ecp3-config.c
> @@ -93,7 +93,7 @@ static void firmware_load(const struct firmware *fw,
> void *context)
>      txbuf[0] = FPGA_CMD_READ_ID;
>      ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>      dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", *(u32 *)&rxbuf[4]);
> -    jedec_id = *(u32 *)&rxbuf[4];
> +    jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);

What about "jedec_id = get_unaligned_be32(&rxbuf[4]);" instead?

etc.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
  2014-07-04 14:58 ` Geert Uytterhoeven
@ 2014-07-04 15:16   ` Jean-Michel Hautbois
  0 siblings, 0 replies; 7+ messages in thread
From: Jean-Michel Hautbois @ 2014-07-04 15:16 UTC (permalink / raw)
  To: Geert Uytterhoeven; +Cc: linux-kernel, Stefan Roese

2014-07-04 16:58 GMT+02:00 Geert Uytterhoeven <geert@linux-m68k.org>:
> On Thu, Jul 3, 2014 at 5:54 PM, Jean-Michel Hautbois
> <jean-michel.hautbois@vodalys.com> wrote:
>> --- a/drivers/misc/lattice-ecp3-config.c
>> +++ b/drivers/misc/lattice-ecp3-config.c
>> @@ -93,7 +93,7 @@ static void firmware_load(const struct firmware *fw,
>> void *context)
>>      txbuf[0] = FPGA_CMD_READ_ID;
>>      ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
>>      dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", *(u32 *)&rxbuf[4]);
>> -    jedec_id = *(u32 *)&rxbuf[4];
>> +    jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);
>
> What about "jedec_id = get_unaligned_be32(&rxbuf[4]);" instead?

Eh I didn't know such a function existed ! :)

JM

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2014-07-04 15:16 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2014-07-03 15:54 [PATCH] Lattice ECP3 FPGA: Correct endianness Jean-Michel Hautbois
2014-07-03 15:59 ` Stefan Roese
2014-07-03 16:12 ` Joe Perches
2014-07-04 13:11   ` Jean-Michel Hautbois
2014-07-04 13:14     ` Stefan Roese
2014-07-04 14:58 ` Geert Uytterhoeven
2014-07-04 15:16   ` Jean-Michel Hautbois

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