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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jie Luo <quic_luoj@quicinc.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, quic_kkumarcs@quicinc.com,
	quic_suruchia@quicinc.com, quic_pavir@quicinc.com,
	quic_linchen@quicinc.com, quic_leiwei@quicinc.com
Subject: Re: [PATCH 1/4] dt-bindings: clock: qcom: Add common PLL clock controller for IPQ SoC
Date: Sat, 10 Aug 2024 13:30:57 +0200	[thread overview]
Message-ID: <53f25764-41d6-491f-9397-988d3e672189@kernel.org> (raw)
In-Reply-To: <a0fe7735-76fd-4a53-9446-5371e341ba17@quicinc.com>

On 09/08/2024 15:01, Jie Luo wrote:
>>> +  clock-names:
>>> +    items:
>>> +      - const: ref
>>> +      - const: ahb
>>> +      - const: sys
>>> +
>>> +  clock-output-names:
>>> +    items:
>>> +      - const: ppe-353mhz
>>> +      - const: eth0-50mhz
>>> +      - const: eth1-50mhz
>>> +      - const: eth2-50mhz
>>> +      - const: eth-25mhz
>>
>> Drop entire property. If the names are fixed, what's the point of having
>> it in DTS? There is no.
> 
> We had added the output names here for the reasons below. Can you please
> let us know your suggestion whether keeping these here is fine?
> 
> 1.) These output clocks are used as input reference clocks to other
> consumer blocks. For example, an on-board Ethernet PHY device may be
> wired to receive a specific clock from the above output clocks as
> reference clock input, and hence the PHY's DTS node would need to
> reference a particular index in this output clock array.
> 
> Without these output clocks being made available in this DTS, the PHY
> driver in above case would not know the clock specifier to access the
> handle for the desired input clock.

That's not true. clock-output-names do not have anything to do with
clock specifier.

> 
> 2.) One of the suggestions from the internal code review with Linaro was
> to name the output clocks specifically based on rate and destination
> (Ex: 'ppe-353mhz' for fixed rate 353 MHZ output clock connected to
> Packet Process Engine block), so that the dt-bindings describe the
> input/output clocks clearly.

Again, that's unrelated. None of above points address my concern. It's
like you talk about some entirely different topic. Again:
clock-output-names have nothing to do with what you want to achieve here.

Best regards,
Krzysztof


  reply	other threads:[~2024-08-10 11:31 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-08 14:03 [PATCH 0/4] Add common PLL clock controller driver for IPQ9574 Luo Jie
2024-08-08 14:03 ` [PATCH 1/4] dt-bindings: clock: qcom: Add common PLL clock controller for IPQ SoC Luo Jie
2024-08-08 14:38   ` Krzysztof Kozlowski
2024-08-09 13:01     ` Jie Luo
2024-08-10 11:30       ` Krzysztof Kozlowski [this message]
2024-08-14 15:13         ` Jie Luo
2024-08-08 14:03 ` [PATCH 2/4] clk: qcom: Add common PLL clock controller driver " Luo Jie
2024-08-10 23:53   ` kernel test robot
2024-08-08 14:03 ` [PATCH 3/4] arm64: defconfig: Enable Qualcomm IPQ common PLL clock controller Luo Jie
2024-08-08 14:41   ` Krzysztof Kozlowski
2024-08-09 11:36     ` Jie Luo
2024-08-09 13:34       ` Andrew Lunn
2024-08-13 12:07         ` Jie Luo
2024-08-08 14:03 ` [PATCH 4/4] arm64: dts: qcom: Add common PLL node for IPQ9574 SoC Luo Jie
2024-08-08 14:45   ` Krzysztof Kozlowski
2024-08-09 11:23     ` Jie Luo

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