From: Krzysztof Kozlowski <krzk@kernel.org>
To: Vasilij Strassheim <v.strassheim@linutronix.de>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Andrew Lunn <andrew@lunn.ch>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Simon Horman <horms@kernel.org>,
Russell King <linux@armlinux.org.uk>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org,
Martin Kaistra <martin.kaistra@linutronix.de>
Subject: Re: [PATCH 2/4] dt-bindings: net: dsa: Add SoC-e switch IP and DSA bindings
Date: Tue, 4 Aug 2026 08:25:20 +0200 [thread overview]
Message-ID: <60ef0086-6137-4e8c-b61b-64e3c833893d@kernel.org> (raw)
In-Reply-To: <411ec84fd55e152e94ac1f4edba497eac3a5623d.camel@linutronix.de>
On 03/08/2026 18:15, Vasilij Strassheim wrote:
> On Thu, 2026-07-30 at 10:56 +0200, Krzysztof Kozlowski wrote:
>> On Wed, Jul 29, 2026 at 06:36:55PM +0200, Vasilij Strassheim wrote:
>>> Add DT schema documentation for SoC-e FPGA switch devices.
>>> The binding is split into:
>>> - a switch IP node describing the MMIO register block
>>> - a DSA MDIO node describing the DSA-facing switch instance
>>> Both nodes are linked through the soce,switch-ip phandle.
>>>
>>> Signed-off-by: Vasilij Strassheim <v.strassheim@linutronix.de>
>>> ---
>>> .../bindings/net/dsa/soce,switch-dsa.yaml | 195 +++++++++++++++++++++
>>> .../bindings/net/dsa/soce,switch-ip.yaml | 54 ++++++
>>> 2 files changed, 249 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/dsa/soce,switch-dsa.yaml b/Documentation/devicetree/bindings/net/dsa/soce,switch-dsa.yaml
>>> new file mode 100644
>>> index 000000000000..a04e2838d14e
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/net/dsa/soce,switch-dsa.yaml
>>> @@ -0,0 +1,195 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/net/dsa/soce,switch-dsa.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: SoC-e DSA switch MDIO device
>>> +
>>> +maintainers:
>>> + - SoC-e <info@soc-e.com>
>>
>> Nope, as explained more than once group boxes are not accepted.
>
> That rule makes actually sense. I just saw UNGLinuxDriver@microchip.com in
> several places and thought it wasn't completely forbidden here.
> Will change it to my address in the next version.
>
>>
>>> +
>>> +description: |
>>> + This node is the MDIO-bus device entry for the SoC-e DSA switch driver.
>>
>> Node is not for a driver. Explain the hardware, not drivers, not DTS.
>
> Got it, will change it for the next version.
>
>>
>>
>>> + It is a lightweight configuration node that lives on the MDIO bus of the
>>> + SoC Ethernet controller acting as the DSA conduit (CPU port).
>>> +
>>> + The switch hardware itself (MMIO register interface) is a separate IP core
>>> + described by a companion node with one of the SoC-e compatible strings,
>>> + for example:
>>> + - soce,mrs-<version>
>>
>> How is this relevant here? do you describe this compatible?
>
> I will completely rework the documentation to reflect other code changes and
> take the comment into account.
>>
>>> + See the consolidated IP-core binding:
>>> + - Documentation/devicetree/bindings/net/dsa/soce,switch-ip.yaml
>>> + The two nodes are linked via the "soce,switch-ip" phandle property.
>>> +
>>> + Port sub-nodes follow the DSA port binding documented in dsa-port.yaml.
>>> + User ports should reference PHY nodes through "phy-handle". These PHY nodes
>>> + live under the optional "mdio" child node of the switch and are exposed on
>>> + the switch's synthetic DSA user MDIO bus.
>>> +
>>> + The PHY-specific properties "soce,mdio-output" and "soce,phy-addr" describe
>>> + the MDIO bus index and hardware PHY address used by the on-chip MDIO master
>>> + of the switch IP core.
>>> +
>>> +properties:
>>> + '#address-cells':
>>> + const: 1
>>> +
>>> + '#size-cells':
>>> + const: 0
>>
>> You need to follow DTS coding style.
>
> I will check and correct this.
>
>>
>>> +
>>> + compatible:
>>> + const: soce,switch-dsa
>>
>> Way too generic. I understand that SoCe will NEVER - and you certify
>> that - develop a second, different "switch-dsa" model and they call this
>> one like this?
>
> It is intentionally generic to cover the common basics of all variants and
> configurations of the synthesized switch in DSA.
Compatible must not be generic, as expressed hundreds times and
documented in writing bindings.
> I'm not sure what kind of guarantee I'm supposed to provide here regarding
> SoCe. If switch-dsa is already mainline in the future, then a different
> compatible will be needed for incompatible new models.
I also don't know what guarantee you must provide, it's you who wants to
add an exception.
...
>>> +
>>> +examples:
>>> + - |
>>> + switch_ip: switch@80020000 {
>>
>> ethernet-switch
>>
>> And drop unused label.
>
> I will adjust it.
>
>>
>> Considering this wasn't tested I should not even give here review...
>>
> Thank you very much for the review!
> I'm not sure what you mean by not tested. I ran make dt_binding_check` few
> times, but forgot to do it after making the latest adjustments.
Untested as it has an obvious failure as reported by bot.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-04 6:25 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 16:36 [PATCH 0/4] net: dsa: Add SoC-e DSA driver Vasilij Strassheim
2026-07-29 16:36 ` [PATCH 1/4] dt-bindings: vendor-prefixes: Add soce Vasilij Strassheim
2026-07-30 8:50 ` Krzysztof Kozlowski
2026-08-03 16:03 ` Vasilij Strassheim
2026-07-29 16:36 ` [PATCH 2/4] dt-bindings: net: dsa: Add SoC-e switch IP and DSA bindings Vasilij Strassheim
2026-07-29 17:11 ` Andrew Lunn
2026-08-03 15:29 ` Vasilij Strassheim
2026-08-03 16:35 ` Andrew Lunn
2026-08-05 12:33 ` Vasilij Strassheim
2026-07-29 18:07 ` Rob Herring (Arm)
2026-08-03 15:47 ` Vasilij Strassheim
2026-07-30 8:56 ` Krzysztof Kozlowski
2026-08-03 16:15 ` Vasilij Strassheim
2026-08-03 16:43 ` Andrew Lunn
2026-08-05 12:40 ` Vasilij Strassheim
2026-08-05 12:53 ` Andrew Lunn
2026-08-05 13:17 ` Vasilij Strassheim
2026-08-05 13:32 ` Benedikt Spranger
2026-08-05 13:53 ` Andrew Lunn
2026-08-05 14:27 ` Benedikt Spranger
2026-08-06 13:35 ` Andrew Lunn
2026-08-06 15:25 ` Benedikt Spranger
2026-08-04 6:25 ` Krzysztof Kozlowski [this message]
2026-08-05 13:03 ` Vasilij Strassheim
2026-07-30 8:56 ` Krzysztof Kozlowski
2026-08-03 16:16 ` Vasilij Strassheim
2026-07-29 16:36 ` [PATCH 3/4] net: dsa: Add support for SoC-e SDSA tags Vasilij Strassheim
2026-07-29 17:22 ` Andrew Lunn
2026-08-03 15:37 ` Vasilij Strassheim
2026-08-03 16:46 ` Andrew Lunn
2026-08-05 12:47 ` Vasilij Strassheim
2026-07-29 16:36 ` [PATCH 4/4] net: dsa: soce: Add initial driver support for MRS switches Vasilij Strassheim
2026-07-29 17:31 ` Andrew Lunn
2026-08-03 15:40 ` Vasilij Strassheim
2026-07-29 20:05 ` Andrew Lunn
2026-08-03 16:01 ` Vasilij Strassheim
2026-08-03 16:49 ` Andrew Lunn
2026-08-05 12:48 ` Vasilij Strassheim
2026-07-30 9:01 ` Krzysztof Kozlowski
2026-08-03 16:23 ` Vasilij Strassheim
2026-07-29 16:56 ` [PATCH 0/4] net: dsa: Add SoC-e DSA driver Andrew Lunn
2026-08-03 15:22 ` Vasilij Strassheim
2026-08-03 16:32 ` Andrew Lunn
2026-08-05 12:28 ` Vasilij Strassheim
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