* [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
@ 2024-09-10 3:03 Delphine CC Chiu
2024-09-12 2:19 ` Andrew Jeffery
0 siblings, 1 reply; 3+ messages in thread
From: Delphine CC Chiu @ 2024-09-10 3:03 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Ricky CX Wu, Delphine CC Chiu, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
From: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Enable spi-gpio setting for spi flash in yosemite4.
Add tpm device under spi.
Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 98477792aa00..fdf9040d655b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -34,6 +34,24 @@ iio-hwmon {
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
<&adc1 0>, <&adc1 1>;
};
+
+ spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sck-gpios = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
+ num-chipselects = <1>;
+
+ tpm@0 {
+ reg = <0>;
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ spi-max-frequency = <33000000>;
+ };
+ };
};
&uart1 {
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
2024-09-10 3:03 [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
@ 2024-09-12 2:19 ` Andrew Jeffery
2024-09-20 7:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Jeffery @ 2024-09-12 2:19 UTC (permalink / raw)
To: Delphine CC Chiu, patrick, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley
Cc: Ricky CX Wu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Tue, 2024-09-10 at 11:03 +0800, Delphine CC Chiu wrote:
> From: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
>
> Enable spi-gpio setting for spi flash in yosemite4.
Is there actually a flash chip on the same bus? You've only described a
TPM. If there's no flash then this seems misleading.
Andrew
> Add tpm device under spi.
>
> Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> ---
> .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> index 98477792aa00..fdf9040d655b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> @@ -34,6 +34,24 @@ iio-hwmon {
> <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
> <&adc1 0>, <&adc1 1>;
> };
> +
> + spi {
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sck-gpios = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
> + mosi-gpios = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
> + miso-gpios = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
> + cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
> + num-chipselects = <1>;
> +
> + tpm@0 {
> + reg = <0>;
> + compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
> + spi-max-frequency = <33000000>;
> + };
> + };
> };
>
> &uart1 {
^ permalink raw reply [flat|nested] 3+ messages in thread* RE: [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
2024-09-12 2:19 ` Andrew Jeffery
@ 2024-09-20 7:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
0 siblings, 0 replies; 3+ messages in thread
From: Delphine_CC_Chiu/WYHQ/Wiwynn @ 2024-09-20 7:57 UTC (permalink / raw)
To: Andrew Jeffery, Delphine_CC_Chiu/WYHQ/Wiwynn, patrick@stwcx.xyz,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley
Cc: Ricky CX Wu, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
> -----Original Message-----
> From: Andrew Jeffery <andrew@codeconstruct.com.au>
> Sent: Thursday, September 12, 2024 10:19 AM
> To: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@wiwynn.com>;
> patrick@stwcx.xyz; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Joel Stanley
> <joel@jms.id.au>
> Cc: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-aspeed@lists.ozlabs.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
>
> [External Sender]
>
> [External Sender]
>
> On Tue, 2024-09-10 at 11:03 +0800, Delphine CC Chiu wrote:
> > From: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
> >
> > Enable spi-gpio setting for spi flash in yosemite4.
>
> Is there actually a flash chip on the same bus? You've only described a TPM. If
> there's no flash then this seems misleading.
>
> Andrew
>
Hi Andrew,
There is only TPM on the bus.
Modified the commit message in V2.
Thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-09-10 3:03 [PATCH v1] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
2024-09-12 2:19 ` Andrew Jeffery
2024-09-20 7:57 ` Delphine_CC_Chiu/WYHQ/Wiwynn
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