[PATCH v2 0/1] cpufreq/amd-pstate: Fix warnings for X86_FEATURE_CPPC

[PATCH v2 0/1] cpufreq/amd-pstate: Fix warnings for X86_FEATURE_CPPC

[Gautham R. Shenoy]

Hello,

This is the 2nd version of the patch to remove the warnings for
X86_FEATURE_CPPC on certain Zen Models.

The v1 was posted here:
https://lore.kernel.org/lkml/20240813095459.2122-1-gautham.shenoy@amd.com/

Changes from v1:

* Removed the warnings only for Zen1 and Zen2 Models 0x70-0x7F after
  feedback from Xioajian.

* Modified some of the comments, and introduced the switch-case
  statement for model range checking to improve readability

The patch is applied on the "amd-pstate-fixes" of
https://git.kernel.org/pub/scm/linux/kernel/git/superm1/linux.git


Gautham R. Shenoy (1):
  cpufreq/amd-pstate: Remove warning for X86_FEATURE_CPPC on certain Zen
    models

 drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

-- 
Thanks and Regards
gautham.

[PATCH v2 1/1] cpufreq/amd-pstate: Remove warning for X86_FEATURE_CPPC on certain Zen models

[Gautham R. Shenoy]

commit bff7d13c190a ("cpufreq: amd-pstate: add debug message while
CPPC is supported and disabled by SBIOS") issues a warning on plaforms
where the X86_FEATURE_CPPC is expected to be enabled, but is not due
to it being disabled in the BIOS.

This feature bit corresponds to CPUID 0x80000008.ebx[27] which is a
reserved bit on the Zen1 processors and a reserved bit on Zen2 based
models 0x70-0x7F, and is expected to be cleared on these
platforms. Thus printing the warning message for these models when
X86_FEATURE_CPPC is unavailable is incorrect. Fix this.

Modify some of the comments, and use switch-case for model range
checking for improved readability while at it.

Fixes: bff7d13c190a ("cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS")
Cc: Xiaojian Du <xiaojian.du@amd.com>
Reported-by: David Wang <00107082@163.com>
Closes: https://lore.kernel.org/lkml/20240730140111.4491-1-00107082@163.com/
Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 89bda7a2bb8d..259a917da75f 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -1834,20 +1834,34 @@ static bool amd_cppc_supported(void)
 	}
 
 	/*
-	 * If the CPPC feature is disabled in the BIOS for processors that support MSR-based CPPC,
-	 * the AMD Pstate driver may not function correctly.
-	 * Check the CPPC flag and display a warning message if the platform supports CPPC.
-	 * Note: below checking code will not abort the driver registeration process because of
-	 * the code is added for debugging purposes.
+	 * If the CPPC feature is disabled in the BIOS for processors
+	 * that support MSR-based CPPC, the AMD Pstate driver may not
+	 * function correctly.
+	 *
+	 * For such processors, check the CPPC flag and display a
+	 * warning message if the platform supports CPPC.
+	 *
+	 * Note: The code check below will not abort the driver
+	 * registration process because of the code is added for
+	 * debugging purposes. Besides, it may still be possible for
+	 * the driver to work using the shared-memory mechanism.
 	 */
 	if (!cpu_feature_enabled(X86_FEATURE_CPPC)) {
-		if (cpu_feature_enabled(X86_FEATURE_ZEN1) || cpu_feature_enabled(X86_FEATURE_ZEN2)) {
-			if (c->x86_model > 0x60 && c->x86_model < 0xaf)
+		if (cpu_feature_enabled(X86_FEATURE_ZEN2)) {
+			switch (c->x86_model) {
+			case 0x60 ... 0x6F:
+			case 0x80 ... 0xAF:
 				warn = true;
-		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) || cpu_feature_enabled(X86_FEATURE_ZEN4)) {
-			if ((c->x86_model > 0x10 && c->x86_model < 0x1F) ||
-					(c->x86_model > 0x40 && c->x86_model < 0xaf))
+				break;
+			}
+		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) ||
+			   cpu_feature_enabled(X86_FEATURE_ZEN4)) {
+			switch (c->x86_model) {
+			case 0x10 ... 0x1F:
+			case 0x40 ... 0xAF:
 				warn = true;
+				break;
+			}
 		} else if (cpu_feature_enabled(X86_FEATURE_ZEN5)) {
 			warn = true;
 		}
-- 
2.34.1

Re: [PATCH v2 1/1] cpufreq/amd-pstate: Remove warning for X86_FEATURE_CPPC on certain Zen models

[Mario Limonciello]

On 8/28/2024 05:10, Gautham R. Shenoy wrote:
> commit bff7d13c190a ("cpufreq: amd-pstate: add debug message while
> CPPC is supported and disabled by SBIOS") issues a warning on plaforms
> where the X86_FEATURE_CPPC is expected to be enabled, but is not due
> to it being disabled in the BIOS.
> 
> This feature bit corresponds to CPUID 0x80000008.ebx[27] which is a
> reserved bit on the Zen1 processors and a reserved bit on Zen2 based
> models 0x70-0x7F, and is expected to be cleared on these
> platforms. Thus printing the warning message for these models when
> X86_FEATURE_CPPC is unavailable is incorrect. Fix this.
> 
> Modify some of the comments, and use switch-case for model range
> checking for improved readability while at it.
> 
> Fixes: bff7d13c190a ("cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS")
> Cc: Xiaojian Du <xiaojian.du@amd.com>
> Reported-by: David Wang <00107082@163.com>
> Closes: https://lore.kernel.org/lkml/20240730140111.4491-1-00107082@163.com/
> Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>

Thanks!

Acked-by: Mario Limonciello <mario.limonciello@amd.com>
Will apply to fixes branch.

> ---
>   drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++----------
>   1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 89bda7a2bb8d..259a917da75f 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -1834,20 +1834,34 @@ static bool amd_cppc_supported(void)
>   	}
>   
>   	/*
> -	 * If the CPPC feature is disabled in the BIOS for processors that support MSR-based CPPC,
> -	 * the AMD Pstate driver may not function correctly.
> -	 * Check the CPPC flag and display a warning message if the platform supports CPPC.
> -	 * Note: below checking code will not abort the driver registeration process because of
> -	 * the code is added for debugging purposes.
> +	 * If the CPPC feature is disabled in the BIOS for processors
> +	 * that support MSR-based CPPC, the AMD Pstate driver may not
> +	 * function correctly.
> +	 *
> +	 * For such processors, check the CPPC flag and display a
> +	 * warning message if the platform supports CPPC.
> +	 *
> +	 * Note: The code check below will not abort the driver
> +	 * registration process because of the code is added for
> +	 * debugging purposes. Besides, it may still be possible for
> +	 * the driver to work using the shared-memory mechanism.
>   	 */
>   	if (!cpu_feature_enabled(X86_FEATURE_CPPC)) {
> -		if (cpu_feature_enabled(X86_FEATURE_ZEN1) || cpu_feature_enabled(X86_FEATURE_ZEN2)) {
> -			if (c->x86_model > 0x60 && c->x86_model < 0xaf)
> +		if (cpu_feature_enabled(X86_FEATURE_ZEN2)) {
> +			switch (c->x86_model) {
> +			case 0x60 ... 0x6F:
> +			case 0x80 ... 0xAF:
>   				warn = true;
> -		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) || cpu_feature_enabled(X86_FEATURE_ZEN4)) {
> -			if ((c->x86_model > 0x10 && c->x86_model < 0x1F) ||
> -					(c->x86_model > 0x40 && c->x86_model < 0xaf))
> +				break;
> +			}
> +		} else if (cpu_feature_enabled(X86_FEATURE_ZEN3) ||
> +			   cpu_feature_enabled(X86_FEATURE_ZEN4)) {
> +			switch (c->x86_model) {
> +			case 0x10 ... 0x1F:
> +			case 0x40 ... 0xAF:
>   				warn = true;
> +				break;
> +			}
>   		} else if (cpu_feature_enabled(X86_FEATURE_ZEN5)) {
>   			warn = true;
>   		}