* [PATCH v2] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel
@ 2025-05-19 2:48 Delphine CC Chiu
2025-05-19 6:10 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Delphine CC Chiu @ 2025-05-19 2:48 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Marshall Zhan, Delphine CC Chiu, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
From: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>
Add gpio line name to support multiplexed console
Signed-off-by: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <delphine_cc_chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 29f224bccd63..aae789854c52 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -189,6 +189,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT1_UART_SEL0","SLOT1_UART_SEL1",
+ "SLOT1_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -235,6 +240,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT2_UART_SEL0","SLOT2_UART_SEL1",
+ "SLOT2_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -281,6 +291,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT3_UART_SEL0","SLOT3_UART_SEL1",
+ "SLOT3_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -327,6 +342,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT4_UART_SEL0","SLOT4_UART_SEL1",
+ "SLOT4_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -373,6 +393,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT5_UART_SEL0","SLOT5_UART_SEL1",
+ "SLOT5_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -419,6 +444,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT6_UART_SEL0","SLOT6_UART_SEL1",
+ "SLOT6_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -465,6 +495,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT7_UART_SEL0","SLOT7_UART_SEL1",
+ "SLOT7_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
@@ -511,6 +546,11 @@ gpio@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "SLOT8_UART_SEL0","SLOT8_UART_SEL1",
+ "SLOT8_UART_SEL2","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
};
gpio@23 {
--
2.25.1
WIWYNN PROPRIETARY
This email (and any attachments) contains proprietary or confidential information and is for the sole use of its intended recipient. Any unauthorized review, use, copying or distribution of this email or the content of this email is strictly prohibited. If you are not the intended recipient, please notify the sender and delete this email immediately.
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel
2025-05-19 2:48 [PATCH v2] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel Delphine CC Chiu
@ 2025-05-19 6:10 ` Krzysztof Kozlowski
2025-05-20 0:23 ` Andrew Jeffery
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-05-19 6:10 UTC (permalink / raw)
To: Delphine CC Chiu, patrick, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery
Cc: Marshall Zhan, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On 19/05/2025 04:48, Delphine CC Chiu wrote:
> WIWYNN PROPRIETARY
> This email (and any attachments) contains proprietary or confidential information and is for the sole use of its intended recipient. Any unauthorized review, use, copying or distribution of this email or the content of this email is strictly prohibited. If you are not the intended recipient, please notify the sender and delete this email immediately.
We cannot test proprietary patches. Start working with the community in
the open.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel
2025-05-19 6:10 ` Krzysztof Kozlowski
@ 2025-05-20 0:23 ` Andrew Jeffery
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Jeffery @ 2025-05-20 0:23 UTC (permalink / raw)
To: Marshall Zhan, Delphine CC Chiu
Cc: Krzysztof Kozlowski, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, patrick, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley
Hi Marshall,
On Mon, 2025-05-19 at 08:10 +0200, Krzysztof Kozlowski wrote:
> On 19/05/2025 04:48, Delphine CC Chiu wrote:
> > WIWYNN PROPRIETARY
> > This email (and any attachments) contains proprietary or confidential information and is for the sole use of its intended recipient. Any unauthorized review, use, copying or distribution of this email or the content of this email is strictly prohibited. If you are not the intended recipient, please notify the sender and delete this email immediately.
>
>
> We cannot test proprietary patches. Start working with the community in
> the open.
The kernel.org mailing list docs elaborate a little on Krzysztof's
point:
https://subspace.kernel.org/etiquette.html#do-not-include-confidentiality-disclaimers
(It's worth reading the rest of the page too).
Cheers,
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-05-19 2:48 [PATCH v2] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel Delphine CC Chiu
2025-05-19 6:10 ` Krzysztof Kozlowski
2025-05-20 0:23 ` Andrew Jeffery
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