From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Jiwei Sun <sjiwei@163.com>
Cc: macro@orcam.me.uk, bhelgaas@google.com,
linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
helgaas@kernel.org, Lukas Wunner <lukas@wunner.de>,
ahuang12@lenovo.com, sunjw10@lenovo.com, jiwei.sun.bj@qq.com,
sunjw10@outlook.com
Subject: Re: [PATCH v2 1/2] PCI: Fix the wrong reading of register fields
Date: Thu, 16 Jan 2025 15:52:26 +0200 (EET) [thread overview]
Message-ID: <8441fdc4-de28-a3ba-27d6-8a5351d4ea19@linux.intel.com> (raw)
In-Reply-To: <20250115134154.9220-2-sjiwei@163.com>
[-- Attachment #1: Type: text/plain, Size: 3522 bytes --]
On Wed, 15 Jan 2025, Jiwei Sun wrote:
> From: Jiwei Sun <sunjw10@lenovo.com>
>
> The macro PCIE_LNKCTL2_TLS2SPEED() and PCIE_LNKCAP_SLS2SPEED() just uses
> the link speed field of the registers. However, there are many other
> different function fields in the Link Control 2 Register or the Link
> Capabilities Register. If the register value is directly used by the two
> macros, it may cause getting an error link speed value (PCI_SPEED_UNKNOWN).
>
> In order to avoid the above-mentioned potential issue, only keep link
> speed field of the two registers before using.
>
> Suggested-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> Signed-off-by: Jiwei Sun <sunjw10@lenovo.com>
Missing Fixes tag.
> ---
> drivers/pci/pci.h | 30 +++++++++++++++++-------------
> 1 file changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index 2e40fc63ba31..b7e5af859517 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -337,12 +337,13 @@ void pci_bus_put(struct pci_bus *bus);
>
> #define PCIE_LNKCAP_SLS2SPEED(lnkcap) \
> ({ \
> - ((lnkcap) == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
> - (lnkcap) == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
> - (lnkcap) == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
> - (lnkcap) == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
> - (lnkcap) == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
> - (lnkcap) == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT : \
> + u32 __lnkcap = (lnkcap) & PCI_EXP_LNKCAP_SLS; \
> + (__lnkcap == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
It would be nice to have an empty line here and below as is in "normal
functions" (obviously the \ continuation at the end of the line is
required).
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This is quite important fix IMO.
> + __lnkcap == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
> + __lnkcap == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
> + __lnkcap == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
> + __lnkcap == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
> + __lnkcap == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT : \
> PCI_SPEED_UNKNOWN); \
> })
>
> @@ -357,13 +358,16 @@ void pci_bus_put(struct pci_bus *bus);
> PCI_SPEED_UNKNOWN)
>
> #define PCIE_LNKCTL2_TLS2SPEED(lnkctl2) \
> - ((lnkctl2) == PCI_EXP_LNKCTL2_TLS_64_0GT ? PCIE_SPEED_64_0GT : \
> - (lnkctl2) == PCI_EXP_LNKCTL2_TLS_32_0GT ? PCIE_SPEED_32_0GT : \
> - (lnkctl2) == PCI_EXP_LNKCTL2_TLS_16_0GT ? PCIE_SPEED_16_0GT : \
> - (lnkctl2) == PCI_EXP_LNKCTL2_TLS_8_0GT ? PCIE_SPEED_8_0GT : \
> - (lnkctl2) == PCI_EXP_LNKCTL2_TLS_5_0GT ? PCIE_SPEED_5_0GT : \
> - (lnkctl2) == PCI_EXP_LNKCTL2_TLS_2_5GT ? PCIE_SPEED_2_5GT : \
> - PCI_SPEED_UNKNOWN)
> +({ \
> + u16 __lnkctl2 = (lnkctl2) & PCI_EXP_LNKCTL2_TLS; \
> + (__lnkctl2 == PCI_EXP_LNKCTL2_TLS_64_0GT ? PCIE_SPEED_64_0GT : \
> + __lnkctl2 == PCI_EXP_LNKCTL2_TLS_32_0GT ? PCIE_SPEED_32_0GT : \
> + __lnkctl2 == PCI_EXP_LNKCTL2_TLS_16_0GT ? PCIE_SPEED_16_0GT : \
> + __lnkctl2 == PCI_EXP_LNKCTL2_TLS_8_0GT ? PCIE_SPEED_8_0GT : \
> + __lnkctl2 == PCI_EXP_LNKCTL2_TLS_5_0GT ? PCIE_SPEED_5_0GT : \
> + __lnkctl2 == PCI_EXP_LNKCTL2_TLS_2_5GT ? PCIE_SPEED_2_5GT : \
> + PCI_SPEED_UNKNOWN); \
> +})
>
> /* PCIe speed to Mb/s reduced by encoding overhead */
> #define PCIE_SPEED2MBS_ENC(speed) \
>
--
i.
next prev parent reply other threads:[~2025-01-16 13:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 13:41 [PATCH v2 0/2] PCI: Fix the wrong reading of register fields Jiwei Sun
2025-01-15 13:41 ` [PATCH v2 1/2] " Jiwei Sun
2025-01-16 13:52 ` Ilpo Järvinen [this message]
2025-01-15 13:41 ` [PATCH v2 2/2] PCI: reread the Link Control 2 Register before using Jiwei Sun
2025-01-16 14:12 ` Ilpo Järvinen
2025-01-16 15:00 ` Maciej W. Rozycki
2025-01-17 13:53 ` Jiwei Sun
2025-01-18 1:03 ` Maciej W. Rozycki
2025-01-20 14:19 ` Jiwei
2025-01-20 15:05 ` Maciej W. Rozycki
2025-01-20 15:20 ` Jiwei
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