[PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[walter.chang]

From: Walter Chang <walter.chang@mediatek.com>

Due to the fact that the use of `writeq_relaxed()` to program CVAL is
not guaranteed to be atomic, it is necessary to disable the timer before
programming CVAL.

However, if the MMIO timer is already enabled and has not yet expired,
there is a possibility of unexpected behavior occurring: when the CPU
enters the idle state during this period, and if the CPU's local event
is earlier than the broadcast event, the following process occurs:

tick_broadcast_enter()
  tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
    __tick_broadcast_oneshot_control()
      ___tick_broadcast_oneshot_control()
        tick_broadcast_set_event()
          clockevents_program_event()
            set_next_event_mem()

During this process, the MMIO timer remains enabled while programming
CVAL. To prevent such behavior, disable timer explicitly prior to
programming CVAL.

Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
Cc: stable@vger.kernel.org
Signed-off-by: Walter Chang <walter.chang@mediatek.com>
---
 drivers/clocksource/arm_arch_timer.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e733a2a1927a..7dd2c615bce2 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -792,6 +792,13 @@ static __always_inline void set_next_event_mem(const int access, unsigned long e
 	u64 cnt;
 
 	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
+
+	/* Timer must be disabled before programming CVAL */
+	if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
+		ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
+		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
+	}
+
 	ctrl |= ARCH_TIMER_CTRL_ENABLE;
 	ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
 
-- 
2.18.0

Re: [PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[Marc Zyngier]

On Mon, 17 Jul 2023 10:07:34 +0100,
<walter.chang@mediatek.com> wrote:
> 
> From: Walter Chang <walter.chang@mediatek.com>
> 
> Due to the fact that the use of `writeq_relaxed()` to program CVAL is
> not guaranteed to be atomic, it is necessary to disable the timer before
> programming CVAL.
> 
> However, if the MMIO timer is already enabled and has not yet expired,
> there is a possibility of unexpected behavior occurring: when the CPU
> enters the idle state during this period, and if the CPU's local event
> is earlier than the broadcast event, the following process occurs:
> 
> tick_broadcast_enter()
>   tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
>     __tick_broadcast_oneshot_control()
>       ___tick_broadcast_oneshot_control()
>         tick_broadcast_set_event()
>           clockevents_program_event()
>             set_next_event_mem()
> 
> During this process, the MMIO timer remains enabled while programming
> CVAL. To prevent such behavior, disable timer explicitly prior to
> programming CVAL.
> 
> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
> Cc: stable@vger.kernel.org
> Signed-off-by: Walter Chang <walter.chang@mediatek.com>

Acked-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[AngeloGioacchino Del Regno]

Il 17/07/23 11:07, walter.chang@mediatek.com ha scritto:
> From: Walter Chang <walter.chang@mediatek.com>
> 
> Due to the fact that the use of `writeq_relaxed()` to program CVAL is
> not guaranteed to be atomic, it is necessary to disable the timer before
> programming CVAL.
> 
> However, if the MMIO timer is already enabled and has not yet expired,
> there is a possibility of unexpected behavior occurring: when the CPU
> enters the idle state during this period, and if the CPU's local event
> is earlier than the broadcast event, the following process occurs:
> 
> tick_broadcast_enter()
>    tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
>      __tick_broadcast_oneshot_control()
>        ___tick_broadcast_oneshot_control()
>          tick_broadcast_set_event()
>            clockevents_program_event()
>              set_next_event_mem()
> 
> During this process, the MMIO timer remains enabled while programming
> CVAL. To prevent such behavior, disable timer explicitly prior to
> programming CVAL.
> 
> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
> Cc: stable@vger.kernel.org
> Signed-off-by: Walter Chang <walter.chang@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

> ---
>   drivers/clocksource/arm_arch_timer.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index e733a2a1927a..7dd2c615bce2 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -792,6 +792,13 @@ static __always_inline void set_next_event_mem(const int access, unsigned long e
>   	u64 cnt;
>   
>   	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
> +
> +	/* Timer must be disabled before programming CVAL */
> +	if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
> +		ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
> +		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
> +	}
> +
>   	ctrl |= ARCH_TIMER_CTRL_ENABLE;
>   	ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
>   

Re: [PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[Walter Chang (張維哲)]

On Mon, 2023-07-17 at 17:07 +0800, walter.chang@mediatek.com wrote:
> From: Walter Chang <walter.chang@mediatek.com>
> 
> Due to the fact that the use of `writeq_relaxed()` to program CVAL is
> not guaranteed to be atomic, it is necessary to disable the timer
> before
> programming CVAL.
> 
> However, if the MMIO timer is already enabled and has not yet
> expired,
> there is a possibility of unexpected behavior occurring: when the CPU
> enters the idle state during this period, and if the CPU's local
> event
> is earlier than the broadcast event, the following process occurs:
> 
> tick_broadcast_enter()
>   tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
>     __tick_broadcast_oneshot_control()
>       ___tick_broadcast_oneshot_control()
>         tick_broadcast_set_event()
>           clockevents_program_event()
>             set_next_event_mem()
> 
> During this process, the MMIO timer remains enabled while programming
> CVAL. To prevent such behavior, disable timer explicitly prior to
> programming CVAL.
> 
> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO
> timer programming over to CVAL")
> Cc: stable@vger.kernel.org
> Signed-off-by: Walter Chang <walter.chang@mediatek.com>
> ---
>  drivers/clocksource/arm_arch_timer.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/clocksource/arm_arch_timer.c
> b/drivers/clocksource/arm_arch_timer.c
> index e733a2a1927a..7dd2c615bce2 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -792,6 +792,13 @@ static __always_inline void
> set_next_event_mem(const int access, unsigned long e
>  	u64 cnt;
>  
>  	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
> +
> +	/* Timer must be disabled before programming CVAL */
> +	if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
> +		ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
> +		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl,
> clk);
> +	}
> +
>  	ctrl |= ARCH_TIMER_CTRL_ENABLE;
>  	ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
>  

Gentle ping for this patch.

Thanks,
Walter Chang

Re: [PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[Daniel Lezcano]

On 18/08/2023 11:29, Walter Chang (張維哲) wrote:
> On Mon, 2023-07-17 at 17:07 +0800, walter.chang@mediatek.com wrote:
>> From: Walter Chang <walter.chang@mediatek.com>
>> 
>> Due to the fact that the use of `writeq_relaxed()` to program CVAL is
>> not guaranteed to be atomic, it is necessary to disable the timer
>> before
>> programming CVAL.
>> 
>> However, if the MMIO timer is already enabled and has not yet
>> expired,
>> there is a possibility of unexpected behavior occurring: when the CPU
>> enters the idle state during this period, and if the CPU's local
>> event
>> is earlier than the broadcast event, the following process occurs:
>> 
>> tick_broadcast_enter()
>>   tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
>>     __tick_broadcast_oneshot_control()
>>       ___tick_broadcast_oneshot_control()
>>         tick_broadcast_set_event()
>>           clockevents_program_event()
>>             set_next_event_mem()
>> 
>> During this process, the MMIO timer remains enabled while programming
>> CVAL. To prevent such behavior, disable timer explicitly prior to
>> programming CVAL.
>> 
>> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO
>> timer programming over to CVAL")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Walter Chang <walter.chang@mediatek.com>
>> ---
>>  drivers/clocksource/arm_arch_timer.c | 7 +++++++
>>  1 file changed, 7 insertions(+)
>> 
>> diff --git a/drivers/clocksource/arm_arch_timer.c
>> b/drivers/clocksource/arm_arch_timer.c
>> index e733a2a1927a..7dd2c615bce2 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -792,6 +792,13 @@ static __always_inline void
>> set_next_event_mem(const int access, unsigned long e
>>  u64 cnt;
>>  
>>  ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
>> +
>> +/* Timer must be disabled before programming CVAL */
>> +if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
>> +ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
>> +arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl,
>> clk);
>> +}
>> +
>>  ctrl |= ARCH_TIMER_CTRL_ENABLE;
>>  ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
>>  
> 
> Gentle ping for this patch.

Applied, thanks

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[tip: timers/core] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

[tip-bot2 for Walter Chang]

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     e7d65e40ab5a5940785c5922f317602d0268caaf
Gitweb:        https://git.kernel.org/tip/e7d65e40ab5a5940785c5922f317602d0268caaf
Author:        Walter Chang <walter.chang@mediatek.com>
AuthorDate:    Mon, 17 Jul 2023 17:07:34 +08:00
Committer:     Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Fri, 18 Aug 2023 12:06:16 +02:00

clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL

Due to the fact that the use of `writeq_relaxed()` to program CVAL is
not guaranteed to be atomic, it is necessary to disable the timer before
programming CVAL.

However, if the MMIO timer is already enabled and has not yet expired,
there is a possibility of unexpected behavior occurring: when the CPU
enters the idle state during this period, and if the CPU's local event
is earlier than the broadcast event, the following process occurs:

tick_broadcast_enter()
  tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER)
    __tick_broadcast_oneshot_control()
      ___tick_broadcast_oneshot_control()
        tick_broadcast_set_event()
          clockevents_program_event()
            set_next_event_mem()

During this process, the MMIO timer remains enabled while programming
CVAL. To prevent such behavior, disable timer explicitly prior to
programming CVAL.

Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
Cc: stable@vger.kernel.org
Signed-off-by: Walter Chang <walter.chang@mediatek.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230717090735.19370-1-walter.chang@mediatek.com
---
 drivers/clocksource/arm_arch_timer.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e09d442..f6c5f89 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -774,6 +774,13 @@ static __always_inline void set_next_event_mem(const int access, unsigned long e
 	u64 cnt;
 
 	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
+
+	/* Timer must be disabled before programming CVAL */
+	if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
+		ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
+		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
+	}
+
 	ctrl |= ARCH_TIMER_CTRL_ENABLE;
 	ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;