Re: [PATCH] arm64: cpufeature: Fix GCIE field ordering in ftr_id_aa64pfr2

[Marc Zyngier <maz@kernel.org>]

On Wed, 15 Apr 2026 21:00:31 +0100,
Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> wrote:
> 
> The ftr_id_aa64pfr2[] array must be sorted in descending order of
> shift value so that the overlap validation in init_cpu_features()
> works correctly. The GCIE field (bits 15:12, shift=12) was placed
> last in the array, after MTEFAR (bits 11:8, shift=8) and
> MTESTOREONLY (bits 7:4, shift=4), causing a spurious warning at
> boot:
> 
> [    0.000000] SYS_ID_AA64PFR2_EL1 has feature overlap at shift 12
> [    0.000000] WARNING: arch/arm64/kernel/cpufeature.c:989 at init_cpu_features+0x144/0x3d0, CPU#0:
> swapper/0
> ..
> 
> [    0.000000] pc : init_cpu_features+0x144/0x3d0
> [    0.000000] lr : init_cpu_features+0x144/0x3d0
> [    0.000000] sp : ffffc08678f03dc0
> 
> ...
>     0.000000] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffffc08678f14000
> [    0.000000] Call trace:
> [    0.000000]  init_cpu_features+0x144/0x3d0 (P)
> [    0.000000]  cpuinfo_store_boot_cpu+0x4c/0x5c
> [    0.000000]  smp_prepare_boot_cpu+0x28/0x38
> [    0.000000]  start_kernel+0x1d4/0x848
> [    0.000000]  __primary_switched+0x88/0x90
> 
> This is because the overlap check computes (shift + width) > prev_shift,
> i.e. (12 + 4) > 8, which triggers since GCIE occupies bits above MTEFAR
> but was listed after it.
> 
> Fix the ordering to match the register layout: FPMR(35:32), GCIE(15:12),
> MTEFAR(11:8), MTESTOREONLY(7:4).
> 
> Fixes: 899ff451fcee ("KVM: arm64: Advertise ID_AA64PFR2_EL1.GCIE")
> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

This was present in next-20260403, identified the following day, a fix
proposed in [1], and the fixed commit appeared in next-20260407 (which
was the subsequent -next build) as 7e629348df81b.

May I humbly suggest that you check with the latest -next branch
before spending time on this sort of things? Two weeks is a pretty
long time...

Thanks,

	M.

[1] https://lore.kernel.org/all/874ilqcu3c.wl-maz@kernel.org/

-- 
Without deviation from the norm, progress is not possible.