Re: [PATCH v4] KVM: arm64: Record whether pKVM stage 2 mapping is cacheable

[Marc Zyngier <maz@kernel.org>]

On Sun, 05 Jul 2026 15:08:58 +0100,
Dev Jain <dev.jain@arm.com> wrote:
> 
> 
> 
> On 02/07/26 12:54 am, Bradley Morgan wrote:
> > pKVM keeps its own mapping list for stage 2 operations. Its flush path
> > uses that list directly, so it lost the PTE attribute check done by the
> > generic stage 2 walker.
> > 
> > Record whether a mapping is cacheable and skip cache maintenance for
> > mappings that are not cacheable.
> > 
> > Fixes: e912efed485a ("KVM: arm64: Introduce the EL1 pKVM MMU")
> 
> Is Fixes tag required? If I am reading correctly, Arm ARM says this:
> 
> "For VA-based cache maintenance instructions, the instruction operates on the
> caches regardless of the memory type and cacheability attributes marked for
> the memory address in the VMSA translation table entries. This means that
> the effects of the cache maintenance instructions can apply regardless of:
>   Whether the address accessed:
>     Is Normal memory or Device memory.
>     Has the Cacheable attribute or the Non-cacheable attribute."
> 
> So nothing goes wrong if we do dcache clean for non-cacheable
> memory.

Two things:

- having to perform CMOs for something that is not *expected* to be
  cacheable is both pointless and a contradiction of the intent

- what you quote is about the nature of the *mapping*, and not the
  memory that is being mapped. Cleaning a dirty cache line on an
  unsuspecting MMIO endpoint is never going to end nicely. Just have a
  try.

My reading of all this is that a fix indeed is required, and therefore
a Fixes tag *must* be present.

	M.

-- 
Jazz isn't dead. It just smells funny.