[PATCH 0/1] mtd: spi-nor: everspin: add em004lxb entry

[PATCH 0/1] mtd: spi-nor: everspin: add em004lxb entry

[Flavio Suligoi]

Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
Memory.
This device is JEDEC compatible (JESD251 and JESD251-1), but it is not able
to provide SFDP information.

Link: https://www.everspin.com/file/158244/download

I currently use this MRAM on one of our i.MX8MP boards.

Flavio Suligoi (1):
  mtd: spi-nor: everspin: add em004lxb entry

 drivers/mtd/spi-nor/everspin.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.34.1

[PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Flavio Suligoi]

Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
Memory.
This device is JEDEC compatible (JESD251 and JESD251-1), but it is not
able to provide SFDP information.

Link: https://www.everspin.com/file/158244/download

Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
---
 drivers/mtd/spi-nor/everspin.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c
index 5f321e24ae7d..4741930ce9a8 100644
--- a/drivers/mtd/spi-nor/everspin.c
+++ b/drivers/mtd/spi-nor/everspin.c
@@ -31,6 +31,14 @@ static const struct flash_info everspin_nor_parts[] = {
 		.size = SZ_512K,
 		.sector_size = SZ_512K,
 		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR,
+	}, {
+		.id = SNOR_ID(0x6b, 0xbb, 0x13),
+		.name = "em004lxb",
+		.size = SZ_512K,
+		.sector_size = SZ_512K,
+		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR | SPI_NOR_HAS_LOCK |
+			 SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
+		.no_sfdp_flags = SPI_NOR_SKIP_SFDP,
 	}
 };
 
-- 
2.34.1

Re: [PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Michael Walle]

Hi,

> Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
> Memory.

Out of curiosity, what is your use case here? Usually, I push back on
this small MRAM devices in SPI-NOR in favor of the at25 driver. But
this datasheet lists octal dtr with 200mhz, which seems a bit ridiculous
for 512kB. The at25 driver only supports single bit SPI of course.

I'm not sure in which mode you are using this device, though. The DS
shows a non-volatile configuration register (Table 10, offset 0) and
it's default value is single bit SPI.

> This device is JEDEC compatible (JESD251 and JESD251-1), but it is not
> able to provide SFDP information.
> 
> Link: https://www.everspin.com/file/158244/download

No newline.

> Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
> ---
>  drivers/mtd/spi-nor/everspin.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/everspin.c 
> b/drivers/mtd/spi-nor/everspin.c
> index 5f321e24ae7d..4741930ce9a8 100644
> --- a/drivers/mtd/spi-nor/everspin.c
> +++ b/drivers/mtd/spi-nor/everspin.c
> @@ -31,6 +31,14 @@ static const struct flash_info everspin_nor_parts[] 
> = {
>  		.size = SZ_512K,
>  		.sector_size = SZ_512K,
>  		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR,
> +	}, {
> +		.id = SNOR_ID(0x6b, 0xbb, 0x13),
> +		.name = "em004lxb",

No name. We prefer to only have the ID for parts which has JEDED IDs.

> +		.size = SZ_512K,
> +		.sector_size = SZ_512K,

This should probably be removed (and then default to the 64k erase
size).

> +		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR | SPI_NOR_HAS_LOCK |

Don't use SPI_NOR_NO_ERASE for new devices. Eventually, I like to get 
rid of
this flag. This device is emulating the erase instruction, so it should 
work
without.

SPI_NOR_NO_FR is wrong here. The DS says it supports fast read.

Please also have a look at [1] for the required tests.

-michael

> +			 SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
> +		.no_sfdp_flags = SPI_NOR_SKIP_SFDP,
>  	}
>  };

[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html

RE: [PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Flavio Suligoi]

Hi Michael,

...

> Subject: Re: [PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry
> 
> Hi,
> 
> > Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
> > Memory.
> 
> Out of curiosity, what is your use case here? Usually, I push back on this small
> MRAM devices in SPI-NOR in favor of the at25 driver. But this datasheet lists
> octal dtr with 200mhz, which seems a bit ridiculous for 512kB. The at25 driver
> only supports single bit SPI of course.
> 
> I'm not sure in which mode you are using this device, though. The DS shows a
> non-volatile configuration register (Table 10, offset 0) and it's default value is
> single bit SPI.
...

We adopted the MRAM to save some important application data in case of
power loss (there are some super-capacitors to maintain the power for a few
seconds).
We use this MRAM in single SPI mode (MISO, MOSI, clock and CS).
About the SPI frequency,  we use only 30MHz, because it is a hw limit of the
MX8MP CPU.

I used the SPI-NOR driver, instead of at25, because in everspin.c there are other
Everspin MRAMs devices (already used in other our boards).

Best regards,
Flavio

[PATCH 0/1] mtd: spi-nor: everspin: add em004lxb entry

[Flavio Suligoi]

Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
Memory.
This device is JEDEC compatible (JESD251 and JESD251-1), but it is not able
to provide SFDP information.

Link: https://www.everspin.com/file/158244/download

I currently use this MRAM on one of our i.MX8MP boards.

Flavio Suligoi (1):
  mtd: spi-nor: everspin: add em004lxb entry

 drivers/mtd/spi-nor/everspin.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.34.1

[PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Flavio Suligoi]

Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
Memory.
This device is JEDEC compatible (JESD251 and JESD251-1), but it is not
able to provide SFDP information.

Link: https://www.everspin.com/file/158244/download

Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
---
 drivers/mtd/spi-nor/everspin.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c
index 5f321e24ae7d..4741930ce9a8 100644
--- a/drivers/mtd/spi-nor/everspin.c
+++ b/drivers/mtd/spi-nor/everspin.c
@@ -31,6 +31,14 @@ static const struct flash_info everspin_nor_parts[] = {
 		.size = SZ_512K,
 		.sector_size = SZ_512K,
 		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR,
+	}, {
+		.id = SNOR_ID(0x6b, 0xbb, 0x13),
+		.name = "em004lxb",
+		.size = SZ_512K,
+		.sector_size = SZ_512K,
+		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR | SPI_NOR_HAS_LOCK |
+			 SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
+		.no_sfdp_flags = SPI_NOR_SKIP_SFDP,
 	}
 };
 
-- 
2.34.1

Re: [PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Francesco Dolcini]

Hello Flavio, thanks for your patch.

On Fri, Apr 05, 2024 at 12:01:04PM +0200, Flavio Suligoi wrote:
> Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
> Memory.
> This device is JEDEC compatible (JESD251 and JESD251-1), but it is not
> able to provide SFDP information.
> 
> Link: https://www.everspin.com/file/158244/download
> 
No empty lines in-between tags

> Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>

Francesco

Re: [PATCH 1/1] mtd: spi-nor: everspin: add em004lxb entry

[Michael Walle]

[-- Attachment #1: Type: text/plain, Size: 1549 bytes --]

Hi Flavio,

On Fri Apr 5, 2024 at 12:01 PM CEST, Flavio Suligoi wrote:
> Add the Everspin EM0004LXB 4Mb (512KB) Industrial STT-MRAM Persistent
> Memory.
> This device is JEDEC compatible (JESD251 and JESD251-1), but it is not
> able to provide SFDP information.

Did you try the at25 driver if it will fit your usecase? Judging
from your last response, it sounds like it will do.

>
> Link: https://www.everspin.com/file/158244/download
>
> Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
> ---
>  drivers/mtd/spi-nor/everspin.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c
> index 5f321e24ae7d..4741930ce9a8 100644
> --- a/drivers/mtd/spi-nor/everspin.c
> +++ b/drivers/mtd/spi-nor/everspin.c
> @@ -31,6 +31,14 @@ static const struct flash_info everspin_nor_parts[] = {
>  		.size = SZ_512K,
>  		.sector_size = SZ_512K,
>  		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR,
> +	}, {
> +		.id = SNOR_ID(0x6b, 0xbb, 0x13),
> +		.name = "em004lxb",
> +		.size = SZ_512K,
> +		.sector_size = SZ_512K,
> +		.flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR | SPI_NOR_HAS_LOCK |

Will it also work without SPI_NOR_NO_ERASE? Also, the flash supports
fast read, so drop NO_FR. Also, please have a look at [1] for the
testing requirements.

Thanks.
-michael

> +			 SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
> +		.no_sfdp_flags = SPI_NOR_SKIP_SFDP,
>  	}
>  };
>  

[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html

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