From: Sean Christopherson <seanjc@google.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: Jiaxi Chen <jiaxi.chen@linux.intel.com>,
kvm@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com, pbonzini@redhat.com, ndesaulniers@google.com,
alexandre.belloni@bootlin.com, peterz@infradead.org,
jpoimboe@kernel.org, chang.seok.bae@intel.com,
pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com,
jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com,
sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com,
keescook@chromium.org, nathan@kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/7] x86: KVM: Move existing x86 CPUID leaf [CPUID_7_1_EAX] to kvm-only leaf
Date: Tue, 15 Nov 2022 15:29:45 +0000 [thread overview]
Message-ID: <Y3OwaRBzVFqJ4KEs@google.com> (raw)
In-Reply-To: <f8607d23-afaa-2670-dd03-2ae8ec1e79a0@intel.com>
On Tue, Nov 15, 2022, Xiaoyao Li wrote:
> On 11/10/2022 9:52 AM, Jiaxi Chen wrote:
> > cpuid_leaf[12] CPUID_7_1_EAX has only two bits are in use currently:
> >
> > - AVX-VNNI CPUID.(EAX=7,ECX=1):EAX[bit 4]
> > - AVX512-BF16 CPUID.(EAX=7,ECX=1):EAX[bit 5]
> >
> > These two bits have no other kernel usages other than the guest
> > CPUID advertisement in KVM. Given that and to save space for kernel
> > feature bits, move these two bits to the kvm-only subleaves. The
> > existing leaf cpuid_leafs[12] is set to CPUID_LNX_5 so future feature
> > can pick it. This basically reverts:
> >
> > - commit b85a0425d805 ("Enumerate AVX Vector Neural Network
> > instructions")
> > - commit b302e4b176d0 ("x86/cpufeatures: Enumerate the new AVX512
> > BFLOAT16 instructions")
> > - commit 1085a6b585d7 ("KVM: Expose AVX_VNNI instruction to guset")
>
> FYI, LAM support has been queued in tip https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=aa387b1b1e666cacffc0b7ac7e0949a68013b2d9
>
> It adds
>
> +#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */
>
> and conflict with this patch.
>
> Seen from the ISE, there are more bits defined in CPUID_7_1_EAX. And I
> believe Intel will define more and it's likely some of them will be used by
> kernel just like LAM.
Heh, are any of the bits you believe Intel will add publicly documented? :-)
LAM could be scattered, but if more bits are expected that's probably a waste of
time and effort.
Thanks for the heads up!
next prev parent reply other threads:[~2022-11-15 15:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 1:52 [PATCH v3 0/7] x86: KVM: Advertise CPUID of new Intel platform Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 1/7] x86: KVM: Move existing x86 CPUID leaf [CPUID_7_1_EAX] to kvm-only leaf Jiaxi Chen
2022-11-15 13:50 ` Xiaoyao Li
2022-11-15 15:29 ` Sean Christopherson [this message]
2022-11-15 16:16 ` Borislav Petkov
2022-11-16 2:27 ` Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 2/7] x86: KVM: Advertise CMPccXADD CPUID to user space Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 3/7] x86: KVM: Advertise AMX-FP16 " Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 4/7] x86: KVM: Advertise AVX-IFMA " Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 5/7] x86: KVM: Advertise AVX-VNNI-INT8 " Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 6/7] x86: KVM: Advertise AVX-NE-CONVERT " Jiaxi Chen
2022-11-10 1:52 ` [PATCH v3 7/7] x86: KVM: Advertise PREFETCHIT0/1 " Jiaxi Chen
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