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From: Ashok Raj <ashok.raj@intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "Luck, Tony" <tony.luck@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
	Ingo Molnar <mingo@kernel.org>,
	"Hansen, Dave" <dave.hansen@intel.com>,
	"Schofield, Alison" <alison.schofield@intel.com>,
	"Chatre, Reinette" <reinette.chatre@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	"Stefan Talpalaru" <stefantalpalaru@yahoo.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Jonathan Corbet <corbet@lwn.net>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Peter Zilstra <peterz@infradead.org>,
	"Lutomirski, Andy" <luto@kernel.org>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"Ostrovsky, Boris" <boris.ostrovsky@oracle.com>,
	Martin Pohlack <mpohlack@amazon.de>,
	Ashok Raj <ashok.raj@intel.com>
Subject: Re: [Patch v3 Part2 3/9] x86/microcode/intel: Fix collect_cpu_info() to reflect current microcode
Date: Wed, 1 Feb 2023 07:13:30 -0800	[thread overview]
Message-ID: <Y9qBmugSm+o5u4pq@a4bf019067fa.jf.intel.com> (raw)
In-Reply-To: <Y9pgzGr4MccwEJAl@zn.tnic>

On Wed, Feb 01, 2023 at 01:53:32PM +0100, Borislav Petkov wrote:
> On Tue, Jan 31, 2023 at 10:43:23PM +0000, Luck, Tony wrote:
> > In an ideal world yes. But what if T1 arrives here and tries to do the
> > update while T0, which has returned out of the microcode update
> > code and could be doing anything, happen to be doing WRMSR(some MSR
> > that the ucode update is tinkering with).
> > 
> > Now T0 explodes (not literally, I hope!) but does something crazy because
> > it was in the middle of some microcode flow that got updated between two
> > operations.
> 
> So first of all, I'm wondering whether the scenario you're chasing is
> something completely hypothetical or you're actually thinking of
> something concrete which has actually happened or there's high potential
> for it.
> 
> In that case, that late patching sync algorithm would need to be made
> more robust to handle cases like that.

That's correct. But fundamentally we sent the sibling down the
apply_microcode() path just to make sure the per-thread info is updated.

It appears the code is using a side effect that the revision got updated
even though we don't actually intend to perform a wrmsr on the sibling
in the normal case that primary completes the update.

If the purpose is only to update the revision, using the collect_cpu_info()
which seems more appropriate for that purpose, and doesn't have any
implied issues with using a wrmsr flow. It's not broken today, but the code
isn't future proof. Calling the revision update only keeps those questions
at bay.

I think this is what Thomas implied to cleanup in his comments. 

> 
> Because from what I'm reading above, this doesn't sound like the
> reporting is wrong only but more like, if T0 fails the update and T1
> gets to do that update for a change, then crap can happen.
> 
> Which means, our update dance cannot handle that case properly.
> 

It doesn't need to if we don't do an apply_microcode() for the sibling.

Cheers,
Ashok

  reply	other threads:[~2023-02-01 15:15 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-30 21:39 [Patch v3 Part2 0/9] x86/microcode: Declare microcode safe for late loading Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 1/9] x86/microcode: Taint kernel only if microcode loading was successful Ashok Raj
2023-01-31 11:50   ` Borislav Petkov
2023-01-31 16:51     ` Ashok Raj
2023-01-31 20:20       ` Borislav Petkov
2023-01-31 22:54         ` Ashok Raj
2023-02-01 12:44           ` Borislav Petkov
2023-02-01 15:42             ` Ashok Raj
2023-02-01 21:47             ` Ashok Raj
2023-02-01 22:06               ` Borislav Petkov
2023-02-01 22:19                 ` Ashok Raj
2023-02-01 22:26                   ` Borislav Petkov
2023-01-31 12:17   ` Li, Aubrey
2023-01-31 15:32     ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 2/9] x86/microcode: Report invalid writes to reload sysfs file Ashok Raj
2023-01-31 15:57   ` [tip: x86/microcode] x86/microcode: Allow only "1" as a late reload trigger value tip-bot2 for Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 3/9] x86/microcode/intel: Fix collect_cpu_info() to reflect current microcode Ashok Raj
2023-01-31 16:48   ` Borislav Petkov
2023-01-31 17:34     ` Luck, Tony
2023-01-31 17:41       ` Ashok Raj
2023-01-31 20:40       ` Borislav Petkov
2023-01-31 20:49         ` Luck, Tony
2023-01-31 21:08           ` Borislav Petkov
2023-01-31 22:32             ` Ashok Raj
2023-01-31 22:43             ` Luck, Tony
2023-02-01 12:53               ` Borislav Petkov
2023-02-01 15:13                 ` Ashok Raj [this message]
2023-02-01 15:25                   ` Borislav Petkov
2023-02-01 16:15                 ` Luck, Tony
2023-02-01 19:13   ` Dave Hansen
2023-02-01 19:32     ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 4/9] x86/microcode: Do not call apply_microcode() on sibling threads Ashok Raj
2023-02-01 22:21   ` Dave Hansen
2023-02-01 22:40     ` Borislav Petkov
2023-02-02  2:51       ` Ashok Raj
2023-02-02  9:40         ` Borislav Petkov
2023-02-02 16:34           ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 5/9] x86/microcode: Move late load warning to the same function that taints kernel Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 6/9] x86/microcode/intel: Add minimum required revision to microcode header Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 7/9] x86/microcode: Add a generic mechanism to declare support for minrev Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 8/9] x86/microcode/intel: Drop wbinvd() from microcode loading Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 9/9] x86/microcode: Provide an option to override minrev enforcement Ashok Raj

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