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* [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device
@ 2021-03-14 20:15 Kyung Min Park
  2021-03-15  0:30 ` Lu Baolu
  2021-03-18 10:24 ` Joerg Roedel
  0 siblings, 2 replies; 3+ messages in thread
From: Kyung Min Park @ 2021-03-14 20:15 UTC (permalink / raw)
  To: iommu, linux-kernel
  Cc: baolu.lu, dwmw2, joro, will, jacob.jun.pan, ashok.raj,
	ravi.v.shankar, yian.chen, sohil.mehta, Kyung Min Park

Currently, the Intel VT-d supports Shared Virtual Memory (SVM) only when
IO page fault is supported. Otherwise, shared memory pages can not be
swapped out and need to be pinned. The device needs the Address Translation
Service (ATS), Page Request Interface (PRI) and Process Address Space
Identifier (PASID) capabilities to be enabled to support IO page fault.

Disable SVM when ATS, PRI and PASID are not enabled in the device.

Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
---
 drivers/iommu/intel/iommu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index ee0932307d64..956a02eb40b4 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5380,6 +5380,9 @@ intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
 		if (!info)
 			return -EINVAL;
 
+		if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled)
+			return -EINVAL;
+
 		if (info->iommu->flags & VTD_FLAG_SVM_CAPABLE)
 			return 0;
 	}
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device
  2021-03-14 20:15 [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device Kyung Min Park
@ 2021-03-15  0:30 ` Lu Baolu
  2021-03-18 10:24 ` Joerg Roedel
  1 sibling, 0 replies; 3+ messages in thread
From: Lu Baolu @ 2021-03-15  0:30 UTC (permalink / raw)
  To: Kyung Min Park, iommu, linux-kernel
  Cc: baolu.lu, dwmw2, joro, will, jacob.jun.pan, ashok.raj,
	ravi.v.shankar, yian.chen, sohil.mehta

On 3/15/21 4:15 AM, Kyung Min Park wrote:
> Currently, the Intel VT-d supports Shared Virtual Memory (SVM) only when
> IO page fault is supported. Otherwise, shared memory pages can not be
> swapped out and need to be pinned. The device needs the Address Translation
> Service (ATS), Page Request Interface (PRI) and Process Address Space
> Identifier (PASID) capabilities to be enabled to support IO page fault.
> 
> Disable SVM when ATS, PRI and PASID are not enabled in the device.
> 
> Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
> ---
>   drivers/iommu/intel/iommu.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index ee0932307d64..956a02eb40b4 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -5380,6 +5380,9 @@ intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
>   		if (!info)
>   			return -EINVAL;
>   
> +		if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled)
> +			return -EINVAL;
> +
>   		if (info->iommu->flags & VTD_FLAG_SVM_CAPABLE)
>   			return 0;
>   	}
> 

Thanks for the patch.

Acked-by: Lu Baolu <baolu.lu@linux.intel.com>

Best regards,
baolu

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device
  2021-03-14 20:15 [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device Kyung Min Park
  2021-03-15  0:30 ` Lu Baolu
@ 2021-03-18 10:24 ` Joerg Roedel
  1 sibling, 0 replies; 3+ messages in thread
From: Joerg Roedel @ 2021-03-18 10:24 UTC (permalink / raw)
  To: Kyung Min Park
  Cc: iommu, linux-kernel, baolu.lu, dwmw2, will, jacob.jun.pan,
	ashok.raj, ravi.v.shankar, yian.chen, sohil.mehta

On Sun, Mar 14, 2021 at 01:15:34PM -0700, Kyung Min Park wrote:
> Currently, the Intel VT-d supports Shared Virtual Memory (SVM) only when
> IO page fault is supported. Otherwise, shared memory pages can not be
> swapped out and need to be pinned. The device needs the Address Translation
> Service (ATS), Page Request Interface (PRI) and Process Address Space
> Identifier (PASID) capabilities to be enabled to support IO page fault.
> 
> Disable SVM when ATS, PRI and PASID are not enabled in the device.
> 
> Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>

Applied, thanks.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-03-18 10:25 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2021-03-14 20:15 [PATCH] iommu/vt-d: Disable SVM when ATS/PRI/PASID are not enabled in the device Kyung Min Park
2021-03-15  0:30 ` Lu Baolu
2021-03-18 10:24 ` Joerg Roedel

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