From: Ashok Raj <ashok.raj@intel.com>
To: Ingo Molnar <mingo@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Tony Luck <tony.luck@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
"LKML Mailing List" <linux-kernel@vger.kernel.org>,
X86-kernel <x86@kernel.org>,
Andy Lutomirski <luto@amacapital.net>,
Tom Lendacky <thomas.lendacky@amd.com>,
Jacon Jun Pan <jacob.jun.pan@intel.com>,
Ashok Raj <ashok.raj@intel.com>
Subject: Re: [PATCH v3 1/5] x86/microcode/intel: Check against CPU signature before saving microcode
Date: Wed, 17 Aug 2022 10:45:49 +0000 [thread overview]
Message-ID: <YvzG3eLXvzpRPRp9@araj-dh-work> (raw)
In-Reply-To: <YvycC5cwBKJFgefV@gmail.com>
Hi Ingo
On Wed, Aug 17, 2022 at 09:43:07AM +0200, Ingo Molnar wrote:
>
> * Ashok Raj <ashok.raj@intel.com> wrote:
>
> > Cc: stable@vger.kernel.org
>
> Not sure the series justifies stable - there's like a ton of things that
> could go wrong with a series like this & we want to have some serious
> testing first.
Its my bad I got lazy and put this patch in the series. This is a *bug* in
existing code, and completely unrelated. I must have submitted it
just by itself.
Boris, let me know if you want me to resubmit and I'll do this by itself.
>
> > list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
> > mc_saved_hdr = (struct microcode_header_intel *)iter->data;
> > - sig = mc_saved_hdr->sig;
> > - pf = mc_saved_hdr->pf;
> >
> > - if (find_matching_signature(data, sig, pf)) {
> > + sig = uci->cpu_sig.sig;
> > + pf = uci->cpu_sig.pf;
> > +
> > + /*
> > + * Compare the current CPUs signature with the ones in the
>
> s/CPUs
> /CPU's
Thanks, will update.
next prev parent reply other threads:[~2022-08-17 10:46 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-17 5:11 [PATCH v3 0/5] Making microcode late-load robust Ashok Raj
2022-08-17 5:11 ` [PATCH v3 1/5] x86/microcode/intel: Check against CPU signature before saving microcode Ashok Raj
2022-08-17 7:43 ` Ingo Molnar
2022-08-17 10:45 ` Ashok Raj [this message]
2022-08-19 10:24 ` Borislav Petkov
2022-08-23 11:13 ` Ashok Raj
2022-08-24 19:27 ` Borislav Petkov
2022-08-25 3:27 ` Ashok Raj
2022-08-26 16:24 ` Borislav Petkov
2022-08-26 17:18 ` Ashok Raj
2022-08-26 17:29 ` Borislav Petkov
2022-08-17 5:11 ` [PATCH v3 2/5] x86/microcode/intel: Allow a late-load only if a min rev is specified Ashok Raj
2022-08-17 7:45 ` Ingo Molnar
2022-08-19 11:11 ` Borislav Petkov
2022-08-23 0:08 ` Ashok Raj
2022-08-24 19:52 ` Borislav Petkov
2022-08-25 4:02 ` Ashok Raj
2022-08-26 12:09 ` Borislav Petkov
2022-08-17 5:11 ` [PATCH v3 3/5] x86/microcode: Avoid any chance of MCE's during microcode update Ashok Raj
2022-08-17 7:41 ` Ingo Molnar
2022-08-17 7:58 ` Ingo Molnar
2022-08-17 8:09 ` Borislav Petkov
2022-08-17 11:57 ` Ashok Raj
2022-08-17 12:10 ` Borislav Petkov
2022-08-17 12:30 ` Ashok Raj
2022-08-17 14:19 ` Borislav Petkov
2022-08-17 15:06 ` Ashok Raj
2022-08-29 14:23 ` Andy Lutomirski
2022-08-17 11:40 ` Ashok Raj
2022-08-17 5:11 ` [PATCH v3 4/5] x86/x2apic: Support x2apic self IPI with NMI_VECTOR Ashok Raj
2022-08-17 5:11 ` [PATCH v3 5/5] x86/microcode: Place siblings in NMI loop while update in progress Ashok Raj
2022-08-30 19:15 ` Andy Lutomirski
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