From: Greg KH <gregkh@linuxfoundation.org>
To: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
UNGLinuxDriver@microchip.com, arnd@arndb.de,
dragan.cvetic@xilinx.com, derek.kiernan@xilinx.com
Subject: Re: [PATCH RFC char-misc-next 1/5] misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device.
Date: Tue, 23 Aug 2022 13:22:52 +0200 [thread overview]
Message-ID: <YwS4jBd5uVvMaTSz@kroah.com> (raw)
In-Reply-To: <20220804163219.921640-2-kumaravel.thiagarajan@microchip.com>
On Thu, Aug 04, 2022 at 10:02:15PM +0530, Kumaravel Thiagarajan wrote:
> pci1xxxx is a PCIe switch with a multi-function endpoint on one of its
> downstream ports. PIO function is one of the functions in the
> multi-function endpoint. PIO function combines a GPIO controller and also
> an interface to program pci1xxxx's OTP & EEPROM. This auxiliary bus driver
> is loaded for the PIO function and separate child devices are enumerated
> for GPIO controller and OTP/EEPROM interface.
>
> Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
> ---
> MAINTAINERS | 8 +
> drivers/misc/Kconfig | 1 +
> drivers/misc/Makefile | 3 +-
> drivers/misc/mchp_pci1xxxx/Kconfig | 10 ++
> drivers/misc/mchp_pci1xxxx/Makefile | 1 +
> drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c | 167 ++++++++++++++++++
> drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.h | 28 +++
> 7 files changed, 217 insertions(+), 1 deletion(-)
> create mode 100644 drivers/misc/mchp_pci1xxxx/Kconfig
> create mode 100644 drivers/misc/mchp_pci1xxxx/Makefile
> create mode 100644 drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c
> create mode 100644 drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 285ffe0df5cf..ba491e4fc35f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -13244,6 +13244,14 @@ S: Supported
> F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
> F: drivers/mtd/nand/raw/atmel/*
>
> +MICROCHIP PCI1XXXX GP DRIVER
> +M: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
> +M: UNGLinuxDriver@microchip.com
Please do not add random email aliases to the MAINTAINERS file, use
people's names and email addresses, otherwise there is no sense of
ownership.
thanks,
greg k-h
next prev parent reply other threads:[~2022-08-23 15:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-04 16:32 [PATCH RFC char-misc-next 0/5] misc: microchip: pci1xxxx: Add auxiliary bus driver and the GPIO driver for PIO function of pci1xxxx Kumaravel Thiagarajan
2022-08-04 16:32 ` [PATCH RFC char-misc-next 1/5] misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device Kumaravel Thiagarajan
2022-08-23 11:22 ` Greg KH [this message]
2022-08-23 11:24 ` Greg KH
2022-08-24 10:03 ` Kumaravel.Thiagarajan
2022-08-04 16:32 ` [PATCH RFC char-misc-next 2/5] misc: microchip: pci1xxxx: load gpio driver for the gpio controller auxiliary device enumerated by the auxiliary bus driver Kumaravel Thiagarajan
2022-08-04 16:32 ` [PATCH RFC char-misc-next 3/5] misc: microchip: pci1xxxx: Add functions to configure gpio pins as input / output, get status, handle I/O for gpio pins Kumaravel Thiagarajan
2022-08-04 16:32 ` [PATCH RFC char-misc-next 4/5] misc: microchip: pci1xxxx: Add gpio irq handler and irq helper functions irq_ack, irq_mask, irq_unmask and irq_set_type of irq_chip Kumaravel Thiagarajan
2022-08-04 16:32 ` [PATCH RFC char-misc-next 5/5] misc: microchip: pci1xxxx: Add power management functions - suspend & resume handlers Kumaravel Thiagarajan
2022-08-23 11:22 ` [PATCH RFC char-misc-next 0/5] misc: microchip: pci1xxxx: Add auxiliary bus driver and the GPIO driver for PIO function of pci1xxxx Greg KH
2022-08-24 9:50 ` Kumaravel.Thiagarajan
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