* [PATCH 1/2] platform/chrome: cros_ec_typec: Expose PD mux status via sysfs
2025-02-03 12:59 [PATCH 0/2] Add sysfs attributes to cros-ec-typec Andrei Kuchynski
@ 2025-02-03 12:59 ` Andrei Kuchynski
2025-02-03 12:59 ` [PATCH 2/2] platform/chrome: cros_ec_typec: Expose AP_MODE_ENTRY feature state " Andrei Kuchynski
2025-02-05 4:22 ` [PATCH 0/2] Add sysfs attributes to cros-ec-typec Tzung-Bi Shih
2 siblings, 0 replies; 4+ messages in thread
From: Andrei Kuchynski @ 2025-02-03 12:59 UTC (permalink / raw)
To: Benson Leung, Tzung-Bi Shih, Guenter Roeck, chrome-platform,
linux-kernel
Cc: Abhishek Pandit-Subedi, Jameson Thies, Łukasz Bartosik,
Andrei Kuchynski
This adds sysfs attribute /sys/class/chromeos/cros_ec/usbpdmuxinfo
to expose the PD mux status for each Type-C port.
This allows user-space applications to easily determine
the current mux state without using ioctls.
Signed-off-by: Andrei Kuchynski <akuchynski@chromium.org>
---
.../ABI/testing/sysfs-class-chromeos | 13 +++++
drivers/platform/chrome/cros_ec_sysfs.c | 58 +++++++++++++++++++
2 files changed, 71 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-class-chromeos b/Documentation/ABI/testing/sysfs-class-chromeos
index 74ece942722e..e067dbdab170 100644
--- a/Documentation/ABI/testing/sysfs-class-chromeos
+++ b/Documentation/ABI/testing/sysfs-class-chromeos
@@ -31,3 +31,16 @@ Date: August 2015
KernelVersion: 4.2
Description:
Show the information about the EC software and hardware.
+
+What: /sys/class/chromeos/cros_ec/usbpdmuxinfo
+Date: February 2025
+Description:
+ Show PD mux status for each typec port with following flags:
+ - "USB": USB connected
+ - "DP": DP connected
+ - "POLARITY": CC line Polarity inverted
+ - "HPD_IRQ": Hot Plug Detect interrupt is asserted
+ - "HPD_LVL": Hot Plug Detect level is asserted
+ - "SAFE": DP is in safe mode
+ - "TBT": TBT enabled
+ - "USB4": USB4 enabled
diff --git a/drivers/platform/chrome/cros_ec_sysfs.c b/drivers/platform/chrome/cros_ec_sysfs.c
index bc1a5ba09528..93e9ed87249c 100644
--- a/drivers/platform/chrome/cros_ec_sysfs.c
+++ b/drivers/platform/chrome/cros_ec_sysfs.c
@@ -296,18 +296,69 @@ static ssize_t kb_wake_angle_store(struct device *dev,
return count;
}
+static ssize_t usbpdmuxinfo_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct cros_ec_dev *ec = to_cros_ec_dev(dev);
+ ssize_t count = 0;
+ struct ec_response_usb_pd_ports resp_pd_ports;
+ int ret;
+ int i;
+
+ ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
+ &resp_pd_ports, sizeof(resp_pd_ports));
+ if (ret < 0)
+ return -EIO;
+
+ for (i = 0; i < resp_pd_ports.num_ports; i++) {
+ struct ec_response_usb_pd_mux_info resp_mux;
+ struct ec_params_usb_pd_mux_info req = {
+ .port = i,
+ };
+
+ ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_USB_PD_MUX_INFO,
+ &req, sizeof(req), &resp_mux, sizeof(resp_mux));
+
+ if (ret >= 0) {
+ count += sysfs_emit_at(buf, count, "Port %d:", i);
+ count += sysfs_emit_at(buf, count, " USB=%d",
+ !!(resp_mux.flags & USB_PD_MUX_USB_ENABLED));
+ count += sysfs_emit_at(buf, count, " DP=%d",
+ !!(resp_mux.flags & USB_PD_MUX_DP_ENABLED));
+ count += sysfs_emit_at(buf, count, " POLARITY=%s",
+ (resp_mux.flags & USB_PD_MUX_POLARITY_INVERTED) ?
+ "INVERTED" : "NORMAL");
+ count += sysfs_emit_at(buf, count, " HPD_IRQ=%d",
+ !!(resp_mux.flags & USB_PD_MUX_HPD_IRQ));
+ count += sysfs_emit_at(buf, count, " HPD_LVL=%d",
+ !!(resp_mux.flags & USB_PD_MUX_HPD_LVL));
+ count += sysfs_emit_at(buf, count, " SAFE=%d",
+ !!(resp_mux.flags & USB_PD_MUX_SAFE_MODE));
+ count += sysfs_emit_at(buf, count, " TBT=%d",
+ !!(resp_mux.flags & USB_PD_MUX_TBT_COMPAT_ENABLED));
+ count += sysfs_emit_at(buf, count, " USB4=%d\n",
+ !!(resp_mux.flags & USB_PD_MUX_USB4_ENABLED));
+ }
+ }
+
+ return count ? : -EIO;
+}
+
/* Module initialization */
static DEVICE_ATTR_RW(reboot);
static DEVICE_ATTR_RO(version);
static DEVICE_ATTR_RO(flashinfo);
static DEVICE_ATTR_RW(kb_wake_angle);
+static DEVICE_ATTR_RO(usbpdmuxinfo);
static struct attribute *__ec_attrs[] = {
&dev_attr_kb_wake_angle.attr,
&dev_attr_reboot.attr,
&dev_attr_version.attr,
&dev_attr_flashinfo.attr,
+ &dev_attr_usbpdmuxinfo.attr,
NULL,
};
@@ -320,6 +371,13 @@ static umode_t cros_ec_ctrl_visible(struct kobject *kobj,
if (a == &dev_attr_kb_wake_angle.attr && !ec->has_kb_wake_angle)
return 0;
+ if (a == &dev_attr_usbpdmuxinfo.attr) {
+ struct cros_ec_platform *ec_platform = dev_get_platdata(ec->dev);
+
+ if (strcmp(ec_platform->ec_name, CROS_EC_DEV_NAME))
+ return 0;
+ }
+
return a->mode;
}
--
2.48.1.362.g079036d154-goog
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] platform/chrome: cros_ec_typec: Expose AP_MODE_ENTRY feature state via sysfs
2025-02-03 12:59 [PATCH 0/2] Add sysfs attributes to cros-ec-typec Andrei Kuchynski
2025-02-03 12:59 ` [PATCH 1/2] platform/chrome: cros_ec_typec: Expose PD mux status via sysfs Andrei Kuchynski
@ 2025-02-03 12:59 ` Andrei Kuchynski
2025-02-05 4:22 ` [PATCH 0/2] Add sysfs attributes to cros-ec-typec Tzung-Bi Shih
2 siblings, 0 replies; 4+ messages in thread
From: Andrei Kuchynski @ 2025-02-03 12:59 UTC (permalink / raw)
To: Benson Leung, Tzung-Bi Shih, Guenter Roeck, chrome-platform,
linux-kernel
Cc: Abhishek Pandit-Subedi, Jameson Thies, Łukasz Bartosik,
Andrei Kuchynski
This adds sysfs attribute /sys/class/chromeos/cros_ec/ap_mode_entry
to expose the status of the AP_MODE_ENTRY feature. This attribute
indicate whether the EC requires direction from the Application
Processor (AP) before entering Type-C alternate modes or USB4 mode.
This allows user-space applications to easily determine if the AP needs
to be involved in mode entry.
Signed-off-by: Andrei Kuchynski <akuchynski@chromium.org>
---
Documentation/ABI/testing/sysfs-class-chromeos | 7 +++++++
drivers/platform/chrome/cros_ec_sysfs.c | 15 ++++++++++++++-
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/testing/sysfs-class-chromeos b/Documentation/ABI/testing/sysfs-class-chromeos
index e067dbdab170..7fa5be6cc774 100644
--- a/Documentation/ABI/testing/sysfs-class-chromeos
+++ b/Documentation/ABI/testing/sysfs-class-chromeos
@@ -44,3 +44,10 @@ Description:
- "SAFE": DP is in safe mode
- "TBT": TBT enabled
- "USB4": USB4 enabled
+
+What: /sys/class/chromeos/cros_ec/ap_mode_entry
+Date: February 2025
+Description:
+ Show if the AP mode entry EC feature is supported.
+ It indicates whether the EC waits for direction from the AP
+ to enter Type-C altmodes or USB4 mode.
diff --git a/drivers/platform/chrome/cros_ec_sysfs.c b/drivers/platform/chrome/cros_ec_sysfs.c
index 93e9ed87249c..f22e9523da3e 100644
--- a/drivers/platform/chrome/cros_ec_sysfs.c
+++ b/drivers/platform/chrome/cros_ec_sysfs.c
@@ -345,6 +345,16 @@ static ssize_t usbpdmuxinfo_show(struct device *dev,
return count ? : -EIO;
}
+static ssize_t ap_mode_entry_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct cros_ec_dev *ec = to_cros_ec_dev(dev);
+ const bool ap_driven_altmode = cros_ec_check_features(
+ ec, EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY);
+
+ return sysfs_emit(buf, "%s\n", ap_driven_altmode ? "yes" : "no");
+}
+
/* Module initialization */
static DEVICE_ATTR_RW(reboot);
@@ -352,6 +362,7 @@ static DEVICE_ATTR_RO(version);
static DEVICE_ATTR_RO(flashinfo);
static DEVICE_ATTR_RW(kb_wake_angle);
static DEVICE_ATTR_RO(usbpdmuxinfo);
+static DEVICE_ATTR_RO(ap_mode_entry);
static struct attribute *__ec_attrs[] = {
&dev_attr_kb_wake_angle.attr,
@@ -359,6 +370,7 @@ static struct attribute *__ec_attrs[] = {
&dev_attr_version.attr,
&dev_attr_flashinfo.attr,
&dev_attr_usbpdmuxinfo.attr,
+ &dev_attr_ap_mode_entry.attr,
NULL,
};
@@ -371,7 +383,8 @@ static umode_t cros_ec_ctrl_visible(struct kobject *kobj,
if (a == &dev_attr_kb_wake_angle.attr && !ec->has_kb_wake_angle)
return 0;
- if (a == &dev_attr_usbpdmuxinfo.attr) {
+ if (a == &dev_attr_usbpdmuxinfo.attr ||
+ a == &dev_attr_ap_mode_entry.attr) {
struct cros_ec_platform *ec_platform = dev_get_platdata(ec->dev);
if (strcmp(ec_platform->ec_name, CROS_EC_DEV_NAME))
--
2.48.1.362.g079036d154-goog
^ permalink raw reply related [flat|nested] 4+ messages in thread