[PATCH] i2c: microchip-core: fix erroneous late ack send

[PATCH] i2c: microchip-core: fix erroneous late ack send

[Conor Dooley]

A late ack is currently being sent at the end of a transfer due to
incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
bit is being written to the controller's control reg after the last
byte has been received, causing it to sent another byte with the ack.
Instead, the AA flag should be written to to the contol register when
the penultimate byte is read so it is sent out for the last byte.

Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com>
Fixes: 64a6f1c4987e ("i2c: add support for microchip fpga i2c controllers")
Tested-by: Lewis Hanly <lewis.hanly@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---

FYI Wolfram, I am still sitting on the MAINTAINERS update as the
SoC updates have not been pulled yet for 6.0 (AFAICT)

 drivers/i2c/busses/i2c-microchip-corei2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-microchip-corei2c.c b/drivers/i2c/busses/i2c-microchip-corei2c.c
index 6df0f1c33278..4d7e9b25f018 100644
--- a/drivers/i2c/busses/i2c-microchip-corei2c.c
+++ b/drivers/i2c/busses/i2c-microchip-corei2c.c
@@ -206,7 +206,7 @@ static void mchp_corei2c_empty_rx(struct mchp_corei2c_dev *idev)
 		idev->msg_len--;
 	}
 
-	if (idev->msg_len == 0) {
+	if (idev->msg_len <= 1) {
 		ctrl = readb(idev->base + CORE_I2C_CTRL);
 		ctrl &= ~CTRL_AA;
 		writeb(ctrl, idev->base + CORE_I2C_CTRL);
-- 
2.36.1

Re: [PATCH] i2c: microchip-core: fix erroneous late ack send

[Wolfram Sang]

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On Fri, Aug 05, 2022 at 08:43:46AM +0100, Conor Dooley wrote:
> A late ack is currently being sent at the end of a transfer due to
> incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
> bit is being written to the controller's control reg after the last
> byte has been received, causing it to sent another byte with the ack.
> Instead, the AA flag should be written to to the contol register when
> the penultimate byte is read so it is sent out for the last byte.
> 
> Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com>
> Fixes: 64a6f1c4987e ("i2c: add support for microchip fpga i2c controllers")
> Tested-by: Lewis Hanly <lewis.hanly@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Fixed these checkpatch warnings:

WARNING: 'contol' may be misspelled - perhaps 'control'?
WARNING: Possible repeated word: 'to'

and applied to for-current, thanks!


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Re: [PATCH] i2c: microchip-core: fix erroneous late ack send

[Conor.Dooley]

On 11/08/2022 13:28, Wolfram Sang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> On Fri, Aug 05, 2022 at 08:43:46AM +0100, Conor Dooley wrote:
>> A late ack is currently being sent at the end of a transfer due to
>> incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
>> bit is being written to the controller's control reg after the last
>> byte has been received, causing it to sent another byte with the ack.
>> Instead, the AA flag should be written to to the contol register when
>> the penultimate byte is read so it is sent out for the last byte.
>>
>> Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com>
>> Fixes: 64a6f1c4987e ("i2c: add support for microchip fpga i2c controllers")
>> Tested-by: Lewis Hanly <lewis.hanly@microchip.com>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> Fixed these checkpatch warnings:
>
> WARNING: 'contol' may be misspelled - perhaps 'control'?
> WARNING: Possible repeated word: 'to'

Heh, that's what I get for editing the commit in send-email..

>
> and applied to for-current, thanks!

Thanks :)

>
>

Re: [PATCH] i2c: microchip-core: fix erroneous late ack send

[Wolfram Sang]

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> Heh, that's what I get for editing the commit in send-email..

I know that feeling... :)


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