* [PATCH v7 0/1] drm/bridge: it6505: fix hibernate to resume no display issue
@ 2024-05-06 9:46 kuro
2024-05-06 9:46 ` [PATCH v7 1/1] " kuro
0 siblings, 1 reply; 6+ messages in thread
From: kuro @ 2024-05-06 9:46 UTC (permalink / raw)
Cc: Allen Chen, Pin-yen Lin, Kuro Chung, Kenneth Haung,
open list:DRM DRIVERS, Jernej Skrabec, Jonas Karlman,
Laurent Pinchart, open list
From: Kuro <kuro.chung@ite.com.tw>
New patch description for v7 patch
modify code from
it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x02); to
it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); for macro define
New patch description for v6 patch
remove the unrelated patch change (split into anoter patch)
remove extra line
New patch description for v5 patch
after customer feedback and test finished, update again, kernel build pass.
New patch description for v4 patch
update by reviewer Pin-yen Lin comment, remove function it6505_irq_video_fifo_error/it6505_irq_io_latch_fifo_overflow
update by reviewer Pin-yen Lin comment, update Signed-off-by column
New patch description for v3 patch
update upstream MAINTAINERS mail list
New patch description for v2 patch
Missing declaration for i variable in function it6505_irq_video_error_handler
, add it by this patch
Origianl description for v1 patch
drm/bridge: it6505: fix hibernate to resume no display issue
ITE added a FIFO reset bit for input video. When system power resume,
the TTL input of it6505 may get some noise before video signal stable
and the hardware function reset is required.
But the input FIFO reset will also trigger error interrupts of output module rising.
Thus, it6505 have to wait a period can clear those expected error interrupts
caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping.
allen (1):
UPSTREAM: drm/bridge: it6505: fix hibernate to resume no display issue
drivers/gpu/drm/bridge/ite-it6505.c | 73 +++++++++++++++++++----------
1 file changed, 49 insertions(+), 24 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue 2024-05-06 9:46 [PATCH v7 0/1] drm/bridge: it6505: fix hibernate to resume no display issue kuro @ 2024-05-06 9:46 ` kuro 2024-05-13 17:42 ` Robert Foss 0 siblings, 1 reply; 6+ messages in thread From: kuro @ 2024-05-06 9:46 UTC (permalink / raw) Cc: Allen Chen, Pin-yen Lin, Kuro Chung, Kenneth Haung, Kuro Chung, Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, open list:DRM DRIVERS, open list From: Kuro <kuro.chung@ite.com.tw> ITE added a FIFO reset bit for input video. When system power resume, the TTL input of it6505 may get some noise before video signal stable and the hardware function reset is required. But the input FIFO reset will also trigger error interrupts of output module rising. Thus, it6505 have to wait a period can clear those expected error interrupts caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping. Signed-off-by: Kuro Chung <kuro.chung@ite.corp-partner.google.com> --- drivers/gpu/drm/bridge/ite-it6505.c | 73 +++++++++++++++++++---------- 1 file changed, 49 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index b53da9bb65a16..64e2706e3d0c3 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -1317,9 +1317,15 @@ static void it6505_video_reset(struct it6505 *it6505) it6505_link_reset_step_train(it6505); it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); + it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); + + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + usleep_range(1000, 2000); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); } @@ -2249,12 +2255,11 @@ static void it6505_link_training_work(struct work_struct *work) if (ret) { it6505->auto_train_retry = AUTO_TRAIN_RETRY; it6505_link_train_ok(it6505); - return; } else { it6505->auto_train_retry--; + it6505_dump(it6505); } - it6505_dump(it6505); } static void it6505_plugged_status_to_codec(struct it6505 *it6505) @@ -2475,31 +2480,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) schedule_work(&it6505->link_works); } -static void it6505_irq_video_fifo_error(struct it6505 *it6505) +static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) { - struct device *dev = &it6505->client->dev; - - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); } -static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) +static void it6505_irq_video_handler(struct it6505 *it6505, const int *int_status) { struct device *dev = &it6505->client->dev; + int reg_0d, reg_int03; - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); -} + /* + * When video SCDT change with video not stable, + * Or video FIFO error, need video reset + */ -static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) -{ - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); + if ((!it6505_get_video_status(it6505) && + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status))) || + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, (unsigned int *) int_status)) || + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, (unsigned int *) int_status))) { + + it6505->auto_train_retry = AUTO_TRAIN_RETRY; + flush_work(&it6505->link_works); + it6505_stop_hdcp(it6505); + it6505_video_reset(it6505); + + usleep_range(10000, 11000); + + /* + * Clear FIFO error IRQ to prevent fifo error -> reset loop + * HW will trigger SCDT change IRQ again when video stable + */ + + reg_int03 = it6505_read(it6505, INT_STATUS_03); + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); + + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); + it6505_write(it6505, INT_STATUS_03, reg_int03); + + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); + + return; + } + + + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status)) + it6505_irq_scdt(it6505); } static irqreturn_t it6505_int_threaded_handler(int unused, void *data) @@ -2512,15 +2539,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) } irq_vec[] = { { BIT_INT_HPD, it6505_irq_hpd }, { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, - { BIT_INT_SCDT, it6505_irq_scdt }, { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, }; int int_status[3], i; @@ -2550,6 +2574,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) irq_vec[i].handler(it6505); } + it6505_irq_video_handler(it6505, (unsigned int *) int_status); } pm_runtime_put_sync(dev); -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue 2024-05-06 9:46 ` [PATCH v7 1/1] " kuro @ 2024-05-13 17:42 ` Robert Foss 2024-05-13 17:44 ` Robert Foss 0 siblings, 1 reply; 6+ messages in thread From: Robert Foss @ 2024-05-13 17:42 UTC (permalink / raw) To: kuro Cc: Allen Chen, Pin-yen Lin, Kenneth Haung, Kuro Chung, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, open list:DRM DRIVERS, open list On Mon, May 6, 2024 at 11:36 AM kuro <kuro.chung@ite.com.tw> wrote: > > From: Kuro <kuro.chung@ite.com.tw> > > ITE added a FIFO reset bit for input video. When system power resume, > the TTL input of it6505 may get some noise before video signal stable > and the hardware function reset is required. > But the input FIFO reset will also trigger error interrupts of output module rising. > Thus, it6505 have to wait a period can clear those expected error interrupts > caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping. > > Signed-off-by: Kuro Chung <kuro.chung@ite.corp-partner.google.com> > > --- > drivers/gpu/drm/bridge/ite-it6505.c | 73 +++++++++++++++++++---------- > 1 file changed, 49 insertions(+), 24 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c > index b53da9bb65a16..64e2706e3d0c3 100644 > --- a/drivers/gpu/drm/bridge/ite-it6505.c > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > @@ -1317,9 +1317,15 @@ static void it6505_video_reset(struct it6505 *it6505) > it6505_link_reset_step_train(it6505); > it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); > it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); > - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > + > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); > + > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); > + > + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > + usleep_range(1000, 2000); > it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); > } > > @@ -2249,12 +2255,11 @@ static void it6505_link_training_work(struct work_struct *work) > if (ret) { > it6505->auto_train_retry = AUTO_TRAIN_RETRY; > it6505_link_train_ok(it6505); > - return; > } else { > it6505->auto_train_retry--; > + it6505_dump(it6505); > } > > - it6505_dump(it6505); > } > > static void it6505_plugged_status_to_codec(struct it6505 *it6505) > @@ -2475,31 +2480,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) > schedule_work(&it6505->link_works); > } > > -static void it6505_irq_video_fifo_error(struct it6505 *it6505) > +static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) > { > - struct device *dev = &it6505->client->dev; > - > - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > - flush_work(&it6505->link_works); > - it6505_stop_hdcp(it6505); > - it6505_video_reset(it6505); > + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > } > > -static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) > +static void it6505_irq_video_handler(struct it6505 *it6505, const int *int_status) > { > struct device *dev = &it6505->client->dev; > + int reg_0d, reg_int03; > > - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > - flush_work(&it6505->link_works); > - it6505_stop_hdcp(it6505); > - it6505_video_reset(it6505); > -} > + /* > + * When video SCDT change with video not stable, > + * Or video FIFO error, need video reset > + */ > > -static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) > -{ > - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > + if ((!it6505_get_video_status(it6505) && > + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status))) || > + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, (unsigned int *) int_status)) || > + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, (unsigned int *) int_status))) { > + > + it6505->auto_train_retry = AUTO_TRAIN_RETRY; > + flush_work(&it6505->link_works); > + it6505_stop_hdcp(it6505); > + it6505_video_reset(it6505); > + > + usleep_range(10000, 11000); > + > + /* > + * Clear FIFO error IRQ to prevent fifo error -> reset loop > + * HW will trigger SCDT change IRQ again when video stable > + */ > + > + reg_int03 = it6505_read(it6505, INT_STATUS_03); > + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); > + > + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); > + it6505_write(it6505, INT_STATUS_03, reg_int03); > + > + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); > + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); > + > + return; > + } > + > + > + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status)) > + it6505_irq_scdt(it6505); > } > > static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > @@ -2512,15 +2539,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > } irq_vec[] = { > { BIT_INT_HPD, it6505_irq_hpd }, > { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, > - { BIT_INT_SCDT, it6505_irq_scdt }, > { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, > { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, > { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, > { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, > { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, > { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, > - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, > - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, > }; > int int_status[3], i; > > @@ -2550,6 +2574,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) > irq_vec[i].handler(it6505); > } > + it6505_irq_video_handler(it6505, (unsigned int *) int_status); > } > > pm_runtime_put_sync(dev); > -- > 2.25.1 > Reviewed-by: Robert Foss <rfoss@kernel.org> ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue 2024-05-13 17:42 ` Robert Foss @ 2024-05-13 17:44 ` Robert Foss 2024-05-14 3:20 ` kuro.chung 2024-05-14 9:13 ` kuro.chung 0 siblings, 2 replies; 6+ messages in thread From: Robert Foss @ 2024-05-13 17:44 UTC (permalink / raw) To: kuro Cc: Allen Chen, Pin-yen Lin, Kenneth Haung, Kuro Chung, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, open list:DRM DRIVERS, open list On Mon, May 13, 2024 at 7:42 PM Robert Foss <rfoss@kernel.org> wrote: > > On Mon, May 6, 2024 at 11:36 AM kuro <kuro.chung@ite.com.tw> wrote: > > > > From: Kuro <kuro.chung@ite.com.tw> > > > > ITE added a FIFO reset bit for input video. When system power resume, > > the TTL input of it6505 may get some noise before video signal stable > > and the hardware function reset is required. > > But the input FIFO reset will also trigger error interrupts of output module rising. > > Thus, it6505 have to wait a period can clear those expected error interrupts > > caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping. > > > > Signed-off-by: Kuro Chung <kuro.chung@ite.corp-partner.google.com> > > > > --- > > drivers/gpu/drm/bridge/ite-it6505.c | 73 +++++++++++++++++++---------- > > 1 file changed, 49 insertions(+), 24 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c > > index b53da9bb65a16..64e2706e3d0c3 100644 > > --- a/drivers/gpu/drm/bridge/ite-it6505.c > > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > > @@ -1317,9 +1317,15 @@ static void it6505_video_reset(struct it6505 *it6505) > > it6505_link_reset_step_train(it6505); > > it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); > > it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); > > - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); > > + > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); > > + > > + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + usleep_range(1000, 2000); > > it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); > > } > > > > @@ -2249,12 +2255,11 @@ static void it6505_link_training_work(struct work_struct *work) > > if (ret) { > > it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > it6505_link_train_ok(it6505); > > - return; > > } else { > > it6505->auto_train_retry--; > > + it6505_dump(it6505); > > } > > > > - it6505_dump(it6505); > > } > > > > static void it6505_plugged_status_to_codec(struct it6505 *it6505) > > @@ -2475,31 +2480,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) > > schedule_work(&it6505->link_works); > > } > > > > -static void it6505_irq_video_fifo_error(struct it6505 *it6505) > > +static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) > > { > > - struct device *dev = &it6505->client->dev; > > - > > - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > > } > > > > -static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) > > +static void it6505_irq_video_handler(struct it6505 *it6505, const int *int_status) > > { > > struct device *dev = &it6505->client->dev; > > + int reg_0d, reg_int03; > > > > - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > -} > > + /* > > + * When video SCDT change with video not stable, > > + * Or video FIFO error, need video reset > > + */ > > > > -static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) > > -{ > > - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > > + if ((!it6505_get_video_status(it6505) && > > + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status))) || > > + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, (unsigned int *) int_status)) || > > + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, (unsigned int *) int_status))) { > > + > > + it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > + flush_work(&it6505->link_works); > > + it6505_stop_hdcp(it6505); > > + it6505_video_reset(it6505); > > + > > + usleep_range(10000, 11000); > > + > > + /* > > + * Clear FIFO error IRQ to prevent fifo error -> reset loop > > + * HW will trigger SCDT change IRQ again when video stable > > + */ > > + > > + reg_int03 = it6505_read(it6505, INT_STATUS_03); > > + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); > > + > > + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); > > + it6505_write(it6505, INT_STATUS_03, reg_int03); > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); > > + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); > > + > > + return; > > + } > > + > > + > > + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status)) > > + it6505_irq_scdt(it6505); > > } > > > > static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > @@ -2512,15 +2539,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > } irq_vec[] = { > > { BIT_INT_HPD, it6505_irq_hpd }, > > { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, > > - { BIT_INT_SCDT, it6505_irq_scdt }, > > { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, > > { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, > > { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, > > { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, > > { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, > > { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, > > - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, > > - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, > > }; > > int int_status[3], i; > > > > @@ -2550,6 +2574,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) > > irq_vec[i].handler(it6505); > > } > > + it6505_irq_video_handler(it6505, (unsigned int *) int_status); > > } > > > > pm_runtime_put_sync(dev); > > -- > > 2.25.1 > > > > Reviewed-by: Robert Foss <rfoss@kernel.org> This patch does not apply on drm-misc-next, please fix this and then this patch is ready to be applied. ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue 2024-05-13 17:44 ` Robert Foss @ 2024-05-14 3:20 ` kuro.chung 2024-05-14 9:13 ` kuro.chung 1 sibling, 0 replies; 6+ messages in thread From: kuro.chung @ 2024-05-14 3:20 UTC (permalink / raw) To: rfoss Cc: allen.chen, treapking, Kenneth.Hung, kuro.chung, andrzej.hajda, neil.armstrong, Laurent.pinchart, jonas, jernej.skrabec, maarten.lankhorst, mripard, tzimmermann, airlied, daniel, dri-devel, linux-kernel -----Original Message----- From: Robert Foss <rfoss@kernel.org> Sent: Tuesday, May 14, 2024 1:45 AM To: Kuro Chung (鐘仕廷) <kuro.chung@ite.com.tw> Cc: Allen Chen <allen.chen@ite.com.tw>; Pin-yen Lin <treapking@chromium.org>; Kenneth Hung (洪家倫) <Kenneth.Hung@ite.com.tw>; Kuro Chung <kuro.chung@ite.corp-partner.google.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil Armstrong <neil.armstrong@linaro.org>; Laurent Pinchart <Laurent.pinchart@ideasonboard.com>; Jonas Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; open list:DRM DRIVERS <dri-devel@lists.freedesktop.org>; open list <linux-kernel@vger.kernel.org> Subject: Re: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue On Mon, May 13, 2024 at 7:42 PM Robert Foss <rfoss@kernel.org> wrote: > > On Mon, May 6, 2024 at 11:36 AM kuro <kuro.chung@ite.com.tw> wrote: > > > > From: Kuro <kuro.chung@ite.com.tw> > > > > ITE added a FIFO reset bit for input video. When system power > > resume, the TTL input of it6505 may get some noise before video > > signal stable and the hardware function reset is required. > > But the input FIFO reset will also trigger error interrupts of output module rising. > > Thus, it6505 have to wait a period can clear those expected error > > interrupts caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping. > > > > Signed-off-by: Kuro Chung <kuro.chung@ite.corp-partner.google.com> > > > > --- > > drivers/gpu/drm/bridge/ite-it6505.c | 73 > > +++++++++++++++++++---------- > > 1 file changed, 49 insertions(+), 24 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c > > b/drivers/gpu/drm/bridge/ite-it6505.c > > index b53da9bb65a16..64e2706e3d0c3 100644 > > --- a/drivers/gpu/drm/bridge/ite-it6505.c > > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > > @@ -1317,9 +1317,15 @@ static void it6505_video_reset(struct it6505 *it6505) > > it6505_link_reset_step_train(it6505); > > it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); > > it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); > > - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, > > + 0x00); > > + > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, > > 0x00); > > + > > + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + usleep_range(1000, 2000); > > it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); > > } > > > > @@ -2249,12 +2255,11 @@ static void it6505_link_training_work(struct work_struct *work) > > if (ret) { > > it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > it6505_link_train_ok(it6505); > > - return; > > } else { > > it6505->auto_train_retry--; > > + it6505_dump(it6505); > > } > > > > - it6505_dump(it6505); > > } > > > > static void it6505_plugged_status_to_codec(struct it6505 *it6505) > > @@ -2475,31 +2480,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) > > schedule_work(&it6505->link_works); > > } > > > > -static void it6505_irq_video_fifo_error(struct it6505 *it6505) > > +static bool it6505_test_bit(unsigned int bit, const unsigned int > > +*addr) > > { > > - struct device *dev = &it6505->client->dev; > > - > > - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % > > + BITS_PER_BYTE)); > > } > > > > -static void it6505_irq_io_latch_fifo_overflow(struct it6505 > > *it6505) > > +static void it6505_irq_video_handler(struct it6505 *it6505, const > > +int *int_status) > > { > > struct device *dev = &it6505->client->dev; > > + int reg_0d, reg_int03; > > > > - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > -} > > + /* > > + * When video SCDT change with video not stable, > > + * Or video FIFO error, need video reset > > + */ > > > > -static bool it6505_test_bit(unsigned int bit, const unsigned int > > *addr) -{ > > - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > > + if ((!it6505_get_video_status(it6505) && > > + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status))) || > > + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, (unsigned int *) int_status)) || > > + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, (unsigned > > + int *) int_status))) { > > + > > + it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > + flush_work(&it6505->link_works); > > + it6505_stop_hdcp(it6505); > > + it6505_video_reset(it6505); > > + > > + usleep_range(10000, 11000); > > + > > + /* > > + * Clear FIFO error IRQ to prevent fifo error -> reset loop > > + * HW will trigger SCDT change IRQ again when video stable > > + */ > > + > > + reg_int03 = it6505_read(it6505, INT_STATUS_03); > > + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); > > + > > + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); > > + it6505_write(it6505, INT_STATUS_03, reg_int03); > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); > > + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); > > + > > + return; > > + } > > + > > + > > + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status)) > > + it6505_irq_scdt(it6505); > > } > > > > static irqreturn_t it6505_int_threaded_handler(int unused, void > > *data) @@ -2512,15 +2539,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > } irq_vec[] = { > > { BIT_INT_HPD, it6505_irq_hpd }, > > { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, > > - { BIT_INT_SCDT, it6505_irq_scdt }, > > { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, > > { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, > > { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, > > { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, > > { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, > > { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, > > - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, > > - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, > > }; > > int int_status[3], i; > > > > @@ -2550,6 +2574,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) > > irq_vec[i].handler(it6505); > > } > > + it6505_irq_video_handler(it6505, (unsigned int *) > > + int_status); > > } > > > > pm_runtime_put_sync(dev); > > -- > > 2.25.1 > > > > Reviewed-by: Robert Foss <rfoss@kernel.org> This patch does not apply on drm-misc-next, please fix this and then this patch is ready to be applied. -> Hi Robert, -> Excuse me, this is my first time to upload the patch, I'm afraid I'm not following, would you mind be more specific or could I have a link or document for reference, -> Thank you. ->and I saw my tracked remote is drm-misc-next, does it anything wrong about upload the patch? ite@ite-XPS-13-9360:~/project/it6505/google/source/cros/src/third_party/kernel/v5.15$ git remote show drm-misc * remote drm-misc Fetch URL: https://anongit.freedesktop.org/git/drm/drm-misc.git Push URL: https://anongit.freedesktop.org/git/drm/drm-misc.git HEAD branch: drm-misc-next Remote branches: drm-misc-fixes new (next fetch will store in remotes/drm-misc) drm-misc-next tracked drm-misc-next-fixes new (next fetch will store in remotes/drm-misc) for-linux-next new (next fetch will store in remotes/drm-misc) for-linux-next-fixes new (next fetch will store in remotes/drm-misc) topic/rust-drm new (next fetch will store in remotes/drm-misc) ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue 2024-05-13 17:44 ` Robert Foss 2024-05-14 3:20 ` kuro.chung @ 2024-05-14 9:13 ` kuro.chung 1 sibling, 0 replies; 6+ messages in thread From: kuro.chung @ 2024-05-14 9:13 UTC (permalink / raw) To: rfoss Cc: allen.chen, treapking, Kenneth.Hung, kuro.chung, andrzej.hajda, neil.armstrong, Laurent.pinchart, jonas, jernej.skrabec, maarten.lankhorst, mripard, tzimmermann, airlied, daniel, dri-devel, linux-kernel -----Original Message----- From: Kuro Chung (鐘仕廷) Sent: Tuesday, May 14, 2024 11:21 AM To: 'Robert Foss' <rfoss@kernel.org> Cc: Allen Chen <allen.chen@ite.com.tw>; Pin-yen Lin <treapking@chromium.org>; Kenneth Hung (洪家倫) <Kenneth.Hung@ite.com.tw>; Kuro Chung <kuro.chung@ite.corp-partner.google.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil Armstrong <neil.armstrong@linaro.org>; Laurent Pinchart <Laurent.pinchart@ideasonboard.com>; Jonas Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; open list:DRM DRIVERS <dri-devel@lists.freedesktop.org>; open list <linux-kernel@vger.kernel.org> Subject: RE: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue -----Original Message----- From: Robert Foss <rfoss@kernel.org> Sent: Tuesday, May 14, 2024 1:45 AM To: Kuro Chung (鐘仕廷) <kuro.chung@ite.com.tw> Cc: Allen Chen <allen.chen@ite.com.tw>; Pin-yen Lin <treapking@chromium.org>; Kenneth Hung (洪家倫) <Kenneth.Hung@ite.com.tw>; Kuro Chung <kuro.chung@ite.corp-partner.google.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil Armstrong <neil.armstrong@linaro.org>; Laurent Pinchart <Laurent.pinchart@ideasonboard.com>; Jonas Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; open list:DRM DRIVERS <dri-devel@lists.freedesktop.org>; open list <linux-kernel@vger.kernel.org> Subject: Re: [PATCH v7 1/1] drm/bridge: it6505: fix hibernate to resume no display issue On Mon, May 13, 2024 at 7:42 PM Robert Foss <rfoss@kernel.org> wrote: > > On Mon, May 6, 2024 at 11:36 AM kuro <kuro.chung@ite.com.tw> wrote: > > > > From: Kuro <kuro.chung@ite.com.tw> > > > > ITE added a FIFO reset bit for input video. When system power > > resume, the TTL input of it6505 may get some noise before video > > signal stable and the hardware function reset is required. > > But the input FIFO reset will also trigger error interrupts of output module rising. > > Thus, it6505 have to wait a period can clear those expected error > > interrupts caused by manual hardware reset in one interrupt handler calling to avoid interrupt looping. > > > > Signed-off-by: Kuro Chung <kuro.chung@ite.corp-partner.google.com> > > > > --- > > drivers/gpu/drm/bridge/ite-it6505.c | 73 > > +++++++++++++++++++---------- > > 1 file changed, 49 insertions(+), 24 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c > > b/drivers/gpu/drm/bridge/ite-it6505.c > > index b53da9bb65a16..64e2706e3d0c3 100644 > > --- a/drivers/gpu/drm/bridge/ite-it6505.c > > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > > @@ -1317,9 +1317,15 @@ static void it6505_video_reset(struct it6505 *it6505) > > it6505_link_reset_step_train(it6505); > > it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); > > it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); > > - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); > > + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, > > + 0x00); > > + > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); > > it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, > > 0x00); > > + > > + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); > > + usleep_range(1000, 2000); > > it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); > > } > > > > @@ -2249,12 +2255,11 @@ static void it6505_link_training_work(struct work_struct *work) > > if (ret) { > > it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > it6505_link_train_ok(it6505); > > - return; > > } else { > > it6505->auto_train_retry--; > > + it6505_dump(it6505); > > } > > > > - it6505_dump(it6505); > > } > > > > static void it6505_plugged_status_to_codec(struct it6505 *it6505) > > @@ -2475,31 +2480,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) > > schedule_work(&it6505->link_works); > > } > > > > -static void it6505_irq_video_fifo_error(struct it6505 *it6505) > > +static bool it6505_test_bit(unsigned int bit, const unsigned int > > +*addr) > > { > > - struct device *dev = &it6505->client->dev; > > - > > - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % > > + BITS_PER_BYTE)); > > } > > > > -static void it6505_irq_io_latch_fifo_overflow(struct it6505 > > *it6505) > > +static void it6505_irq_video_handler(struct it6505 *it6505, const > > +int *int_status) > > { > > struct device *dev = &it6505->client->dev; > > + int reg_0d, reg_int03; > > > > - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); > > - it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > - flush_work(&it6505->link_works); > > - it6505_stop_hdcp(it6505); > > - it6505_video_reset(it6505); > > -} > > + /* > > + * When video SCDT change with video not stable, > > + * Or video FIFO error, need video reset > > + */ > > > > -static bool it6505_test_bit(unsigned int bit, const unsigned int > > *addr) -{ > > - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); > > + if ((!it6505_get_video_status(it6505) && > > + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status))) || > > + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, (unsigned int *) int_status)) || > > + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, (unsigned > > + int *) int_status))) { > > + > > + it6505->auto_train_retry = AUTO_TRAIN_RETRY; > > + flush_work(&it6505->link_works); > > + it6505_stop_hdcp(it6505); > > + it6505_video_reset(it6505); > > + > > + usleep_range(10000, 11000); > > + > > + /* > > + * Clear FIFO error IRQ to prevent fifo error -> reset loop > > + * HW will trigger SCDT change IRQ again when video stable > > + */ > > + > > + reg_int03 = it6505_read(it6505, INT_STATUS_03); > > + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); > > + > > + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); > > + it6505_write(it6505, INT_STATUS_03, reg_int03); > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); > > + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); > > + > > + return; > > + } > > + > > + > > + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *) int_status)) > > + it6505_irq_scdt(it6505); > > } > > > > static irqreturn_t it6505_int_threaded_handler(int unused, void > > *data) @@ -2512,15 +2539,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > } irq_vec[] = { > > { BIT_INT_HPD, it6505_irq_hpd }, > > { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, > > - { BIT_INT_SCDT, it6505_irq_scdt }, > > { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, > > { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, > > { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, > > { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, > > { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, > > { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, > > - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, > > - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, > > }; > > int int_status[3], i; > > > > @@ -2550,6 +2574,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) > > if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) > > irq_vec[i].handler(it6505); > > } > > + it6505_irq_video_handler(it6505, (unsigned int *) > > + int_status); > > } > > > > pm_runtime_put_sync(dev); > > -- > > 2.25.1 > > > > Reviewed-by: Robert Foss <rfoss@kernel.org> This patch does not apply on drm-misc-next, please fix this and then this patch is ready to be applied. -> It seems this patch conflict already, I will update a new one., thanks. -> Hi Robert, -> Excuse me, this is my first time to upload the patch, I'm afraid I'm -> not following, would you mind be more specific or could I have a link or document for reference, Thank you. ->and I saw my tracked remote is drm-misc-next, does it anything wrong about upload the patch? ite@ite-XPS-13-9360:~/project/it6505/google/source/cros/src/third_party/kernel/v5.15$ git remote show drm-misc * remote drm-misc Fetch URL: https://anongit.freedesktop.org/git/drm/drm-misc.git Push URL: https://anongit.freedesktop.org/git/drm/drm-misc.git HEAD branch: drm-misc-next Remote branches: drm-misc-fixes new (next fetch will store in remotes/drm-misc) drm-misc-next tracked drm-misc-next-fixes new (next fetch will store in remotes/drm-misc) for-linux-next new (next fetch will store in remotes/drm-misc) for-linux-next-fixes new (next fetch will store in remotes/drm-misc) topic/rust-drm new (next fetch will store in remotes/drm-misc) ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-05-14 9:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-05-06 9:46 [PATCH v7 0/1] drm/bridge: it6505: fix hibernate to resume no display issue kuro 2024-05-06 9:46 ` [PATCH v7 1/1] " kuro 2024-05-13 17:42 ` Robert Foss 2024-05-13 17:44 ` Robert Foss 2024-05-14 3:20 ` kuro.chung 2024-05-14 9:13 ` kuro.chung
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