* [PATCH v5 1/5] Documentation: ABI: IIO: add calibconv_delay documentation
2025-05-19 10:13 [PATCH v5 0/5] iio: adc: add ad7606 calibration support Angelo Dureghello
@ 2025-05-19 10:13 ` Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 2/5] iio: core: add ADC delay calibration definition Angelo Dureghello
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Angelo Dureghello @ 2025-05-19 10:13 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Lars-Peter Clausen, Michael Hennerich, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-iio, linux-kernel, Michael Hennerich, devicetree,
Angelo Dureghello
From: Angelo Dureghello <adureghello@baylibre.com>
Add new IIO calibconv_delay documentation.
The ad7606 implements a phase calibation feature, in nanoseconds.
Being this a time delay, using the conv_delay suffix.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
Documentation/ABI/testing/sysfs-bus-iio | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
index 190bfcc1e836b69622692d7c056c0092e00f1a9b..4cf482eca3d8a0a80b051fbb496f82f836ab76f8 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -559,6 +559,30 @@ Description:
- a small discrete set of values like "0 2 4 6 8"
- a range specified as "[min step max]"
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_convdelay
+KernelVersion: 6.16
+Contact: linux-iio@vger.kernel.org
+Description:
+ Delay of start of conversion from common reference point shared
+ by all channels. Can be writable when used to compensate for
+ delay variation introduced by external filters feeding a
+ simultaneous sampling ADC.
+
+ I.e., for the ad7606 ADC series, this value is intended as a
+ configurable time delay in seconds, to correct delay introduced
+ by an optional external filtering circuit.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_convdelay_available
+KernelVersion: 6.16
+Contact: linux-iio@vger.kernel.org
+Description:
+ Available values of convdelay. Maybe expressed as:
+
+ - a range specified as "[min step max]"
+
+ If shared across all channels, <type>_calibconv_delay_available
+ is used.
+
What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale
What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale
What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v5 2/5] iio: core: add ADC delay calibration definition
2025-05-19 10:13 [PATCH v5 0/5] iio: adc: add ad7606 calibration support Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 1/5] Documentation: ABI: IIO: add calibconv_delay documentation Angelo Dureghello
@ 2025-05-19 10:13 ` Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 3/5] iio: adc: ad7606: add offset and phase calibration support Angelo Dureghello
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Angelo Dureghello @ 2025-05-19 10:13 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Lars-Peter Clausen, Michael Hennerich, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-iio, linux-kernel, Michael Hennerich, devicetree,
Angelo Dureghello
From: Angelo Dureghello <adureghello@baylibre.com>
ADCs as ad7606 implement a phase calibration as a delay.
Add such definition, needed for ad7606.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
drivers/iio/industrialio-core.c | 1 +
include/linux/iio/types.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
index 178e99b111debc59a247fcc3a6037e429db3bebf..f13c3aa470d774bfe655d6a9fb00c263789db637 100644
--- a/drivers/iio/industrialio-core.c
+++ b/drivers/iio/industrialio-core.c
@@ -188,6 +188,7 @@ static const char * const iio_chan_info_postfix[] = {
[IIO_CHAN_INFO_CALIBAMBIENT] = "calibambient",
[IIO_CHAN_INFO_ZEROPOINT] = "zeropoint",
[IIO_CHAN_INFO_TROUGH] = "trough_raw",
+ [IIO_CHAN_INFO_CONVDELAY] = "convdelay",
};
/**
* iio_device_id() - query the unique ID for the device
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index d89982c98368cf72c0fc30fa66ab001e48af4e8b..ad2761efcc8315e1f9907d2a7159447fb463333e 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -69,6 +69,7 @@ enum iio_chan_info_enum {
IIO_CHAN_INFO_CALIBAMBIENT,
IIO_CHAN_INFO_ZEROPOINT,
IIO_CHAN_INFO_TROUGH,
+ IIO_CHAN_INFO_CONVDELAY,
};
#endif /* _IIO_TYPES_H_ */
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v5 3/5] iio: adc: ad7606: add offset and phase calibration support
2025-05-19 10:13 [PATCH v5 0/5] iio: adc: add ad7606 calibration support Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 1/5] Documentation: ABI: IIO: add calibconv_delay documentation Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 2/5] iio: core: add ADC delay calibration definition Angelo Dureghello
@ 2025-05-19 10:13 ` Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 4/5] dt-bindings: iio: adc: adi,ad7606: add gain " Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 5/5] iio: adc: ad7606: " Angelo Dureghello
4 siblings, 0 replies; 7+ messages in thread
From: Angelo Dureghello @ 2025-05-19 10:13 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Lars-Peter Clausen, Michael Hennerich, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-iio, linux-kernel, Michael Hennerich, devicetree,
Angelo Dureghello
From: Angelo Dureghello <adureghello@baylibre.com>
Add support for offset and phase calibration, only for
devices that support software mode, that are:
ad7606b
ad7606c-16
ad7606c-18
Tested-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
drivers/iio/adc/ad7606.c | 160 +++++++++++++++++++++++++++++++++++++++++++++++
drivers/iio/adc/ad7606.h | 9 +++
2 files changed, 169 insertions(+)
diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c
index 2aa59481c52c07537110e7fc1fd1aedbab6b098d..bb0c89fc618874f4a5948d8e537716f87127bc92 100644
--- a/drivers/iio/adc/ad7606.c
+++ b/drivers/iio/adc/ad7606.c
@@ -95,6 +95,22 @@ static const unsigned int ad7616_oversampling_avail[8] = {
1, 2, 4, 8, 16, 32, 64, 128,
};
+static const int ad7606_calib_offset_avail[3] = {
+ -128, 1, 127,
+};
+
+static const int ad7606c_18bit_calib_offset_avail[3] = {
+ -512, 4, 508,
+};
+
+static const int ad7606b_calib_phase_avail[][2] = {
+ { 0, 0 }, { 0, 1250 }, { 0, 318750 },
+};
+
+static const int ad7606c_calib_phase_avail[][2] = {
+ { 0, 0 }, { 0, 1000 }, { 0, 255000 },
+};
+
static int ad7606c_18bit_chan_scale_setup(struct iio_dev *indio_dev,
struct iio_chan_spec *chan);
static int ad7606c_16bit_chan_scale_setup(struct iio_dev *indio_dev,
@@ -164,6 +180,8 @@ const struct ad7606_chip_info ad7606b_info = {
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_offset_avail = ad7606_calib_offset_avail,
+ .calib_phase_avail = ad7606b_calib_phase_avail,
};
EXPORT_SYMBOL_NS_GPL(ad7606b_info, "IIO_AD7606");
@@ -177,6 +195,8 @@ const struct ad7606_chip_info ad7606c_16_info = {
.scale_setup_cb = ad7606c_16bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_offset_avail = ad7606_calib_offset_avail,
+ .calib_phase_avail = ad7606c_calib_phase_avail,
};
EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, "IIO_AD7606");
@@ -226,6 +246,8 @@ const struct ad7606_chip_info ad7606c_18_info = {
.scale_setup_cb = ad7606c_18bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_offset_avail = ad7606c_18bit_calib_offset_avail,
+ .calib_phase_avail = ad7606c_calib_phase_avail,
};
EXPORT_SYMBOL_NS_GPL(ad7606c_18_info, "IIO_AD7606");
@@ -683,6 +705,40 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
return ret;
}
+static int ad7606_get_calib_offset(struct ad7606_state *st, int ch, int *val)
+{
+ int ret;
+
+ ret = st->bops->reg_read(st, AD7606_CALIB_OFFSET(ch));
+ if (ret < 0)
+ return ret;
+
+ *val = st->chip_info->calib_offset_avail[0] +
+ ret * st->chip_info->calib_offset_avail[1];
+
+ return 0;
+}
+
+static int ad7606_get_calib_phase(struct ad7606_state *st, int ch, int *val,
+ int *val2)
+{
+ int ret;
+
+ ret = st->bops->reg_read(st, AD7606_CALIB_PHASE(ch));
+ if (ret < 0)
+ return ret;
+
+ *val = 0;
+
+ /*
+ * ad7606b: phase delay from 0 to 318.75 μs in steps of 1.25 μs.
+ * ad7606c-16/18: phase delay from 0 µs to 255 µs in steps of 1 µs.
+ */
+ *val2 = ret * st->chip_info->calib_phase_avail[1][1];
+
+ return 0;
+}
+
static int ad7606_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
@@ -717,6 +773,22 @@ static int ad7606_read_raw(struct iio_dev *indio_dev,
pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
*val = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, cnvst_pwm_state.period);
return IIO_VAL_INT;
+ case IIO_CHAN_INFO_CALIBBIAS:
+ if (!iio_device_claim_direct(indio_dev))
+ return -EBUSY;
+ ret = ad7606_get_calib_offset(st, chan->scan_index, val);
+ iio_device_release_direct(indio_dev);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_CONVDELAY:
+ if (!iio_device_claim_direct(indio_dev))
+ return -EBUSY;
+ ret = ad7606_get_calib_phase(st, chan->scan_index, val, val2);
+ iio_device_release_direct(indio_dev);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT_PLUS_NANO;
}
return -EINVAL;
}
@@ -767,6 +839,64 @@ static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
return 0;
}
+static int ad7606_set_calib_offset(struct ad7606_state *st, int ch, int val)
+{
+ int start_val, step_val, stop_val;
+ int offset;
+
+ start_val = st->chip_info->calib_offset_avail[0];
+ step_val = st->chip_info->calib_offset_avail[1];
+ stop_val = st->chip_info->calib_offset_avail[2];
+
+ if (val < start_val || val > stop_val)
+ return -EINVAL;
+
+ offset = (val - start_val) / step_val;
+
+ return st->bops->reg_write(st, AD7606_CALIB_OFFSET(ch), offset);
+}
+
+static int ad7606_set_calib_phase(struct ad7606_state *st, int ch, int val,
+ int val2)
+{
+ int wreg, start_ns, step_ns, stop_ns;
+
+ if (val != 0)
+ return -EINVAL;
+
+ start_ns = st->chip_info->calib_phase_avail[0][1];
+ step_ns = st->chip_info->calib_phase_avail[1][1];
+ stop_ns = st->chip_info->calib_phase_avail[2][1];
+
+ /*
+ * ad7606b: phase delay from 0 to 318.75 μs in steps of 1.25 μs.
+ * ad7606c-16/18: phase delay from 0 µs to 255 µs in steps of 1 µs.
+ */
+ if (val2 < start_ns || val2 > stop_ns)
+ return -EINVAL;
+
+ wreg = val2 / step_ns;
+
+ return st->bops->reg_write(st, AD7606_CALIB_PHASE(ch), wreg);
+}
+
+static int ad7606_write_raw_get_fmt(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, long info)
+{
+ switch (info) {
+ case IIO_CHAN_INFO_SCALE:
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
+ case IIO_CHAN_INFO_CALIBBIAS:
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_CONVDELAY:
+ return IIO_VAL_INT_PLUS_NANO;
+ default:
+ return -EINVAL;
+ }
+}
+
static int ad7606_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
@@ -820,6 +950,18 @@ static int ad7606_write_raw(struct iio_dev *indio_dev,
if (val < 0 && val2 != 0)
return -EINVAL;
return ad7606_set_sampling_freq(st, val);
+ case IIO_CHAN_INFO_CALIBBIAS:
+ if (!iio_device_claim_direct(indio_dev))
+ return -EBUSY;
+ ret = ad7606_set_calib_offset(st, chan->scan_index, val);
+ iio_device_release_direct(indio_dev);
+ return ret;
+ case IIO_CHAN_INFO_CONVDELAY:
+ if (!iio_device_claim_direct(indio_dev))
+ return -EBUSY;
+ ret = ad7606_set_calib_phase(st, chan->scan_index, val, val2);
+ iio_device_release_direct(indio_dev);
+ return ret;
default:
return -EINVAL;
}
@@ -998,6 +1140,14 @@ static int ad7606_read_avail(struct iio_dev *indio_dev,
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
+ case IIO_CHAN_INFO_CALIBBIAS:
+ *vals = st->chip_info->calib_offset_avail;
+ *type = IIO_VAL_INT;
+ return IIO_AVAIL_RANGE;
+ case IIO_CHAN_INFO_CONVDELAY:
+ *vals = (const int *)st->chip_info->calib_phase_avail;
+ *type = IIO_VAL_INT_PLUS_NANO;
+ return IIO_AVAIL_RANGE;
}
return -EINVAL;
}
@@ -1060,6 +1210,7 @@ static const struct iio_info ad7606_info_sw_mode = {
.read_raw = &ad7606_read_raw,
.write_raw = &ad7606_write_raw,
.read_avail = &ad7606_read_avail,
+ .write_raw_get_fmt = ad7606_write_raw_get_fmt,
.debugfs_reg_access = &ad7606_reg_access,
.validate_trigger = &ad7606_validate_trigger,
.update_scan_mode = &ad7606_update_scan_mode,
@@ -1252,6 +1403,15 @@ static int ad7606_probe_channels(struct iio_dev *indio_dev)
chan->info_mask_separate_available |=
BIT(IIO_CHAN_INFO_SCALE);
+ if (st->chip_info->calib_offset_avail) {
+ chan->info_mask_separate |=
+ BIT(IIO_CHAN_INFO_CALIBBIAS) |
+ BIT(IIO_CHAN_INFO_CONVDELAY);
+ chan->info_mask_separate_available |=
+ BIT(IIO_CHAN_INFO_CALIBBIAS) |
+ BIT(IIO_CHAN_INFO_CONVDELAY);
+ }
+
/*
* All chips with software mode support oversampling,
* so we skip the oversampling_available check. And the
diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h
index 441e62c521bcbea69b4f70bb2d55f65334d22276..f613583a7fa4095115b0b28e3f8e51cd32b93524 100644
--- a/drivers/iio/adc/ad7606.h
+++ b/drivers/iio/adc/ad7606.h
@@ -40,6 +40,11 @@
#define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1))
#define AD7606_OS_MODE 0x08
+#define AD7606_CALIB_GAIN(ch) (0x09 + (ch))
+#define AD7606_CALIB_GAIN_MASK GENMASK(5, 0)
+#define AD7606_CALIB_OFFSET(ch) (0x11 + (ch))
+#define AD7606_CALIB_PHASE(ch) (0x19 + (ch))
+
struct ad7606_state;
typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev,
@@ -61,6 +66,8 @@ typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
* @init_delay_ms: required delay in milliseconds for initialization
* after a restart
* @offload_storagebits: storage bits used by the offload hw implementation
+ * @calib_offset_avail: pointer to offset calibration range/limits array
+ * @calib_phase_avail: pointer to phase calibration range/limits array
*/
struct ad7606_chip_info {
unsigned int max_samplerate;
@@ -74,6 +81,8 @@ struct ad7606_chip_info {
bool os_req_reset;
unsigned long init_delay_ms;
u8 offload_storagebits;
+ const int *calib_offset_avail;
+ const int (*calib_phase_avail)[2];
};
/**
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v5 4/5] dt-bindings: iio: adc: adi,ad7606: add gain calibration support
2025-05-19 10:13 [PATCH v5 0/5] iio: adc: add ad7606 calibration support Angelo Dureghello
` (2 preceding siblings ...)
2025-05-19 10:13 ` [PATCH v5 3/5] iio: adc: ad7606: add offset and phase calibration support Angelo Dureghello
@ 2025-05-19 10:13 ` Angelo Dureghello
2025-05-19 10:13 ` [PATCH v5 5/5] iio: adc: ad7606: " Angelo Dureghello
4 siblings, 0 replies; 7+ messages in thread
From: Angelo Dureghello @ 2025-05-19 10:13 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Lars-Peter Clausen, Michael Hennerich, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-iio, linux-kernel, Michael Hennerich, devicetree,
Angelo Dureghello, Conor Dooley
From: Angelo Dureghello <adureghello@baylibre.com>
Add gain calibration support by a per-channel resistor value.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
.../devicetree/bindings/iio/adc/adi,ad7606.yaml | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
index 29f12d650442b8ff2eb455306ce59a0e87867ddd..6926f5f090ad6bbbe7bfd9327dc5ae17dafcd1fd 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
@@ -204,6 +204,15 @@ patternProperties:
considered a bipolar differential channel. Otherwise it is bipolar
single-ended.
+ adi,rfilter-ohms:
+ description:
+ For ADCs that supports gain calibration, this property must be set to
+ the value of the external RFilter resistor. Proper gain error
+ correction is applied based on this value.
+ default: 0
+ minimum: 0
+ maximum: 64512
+
required:
- reg
- bipolar
@@ -256,6 +265,25 @@ allOf:
properties:
adi,oversampling-ratio-gpios: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - adi,ad7605-4
+ - adi,ad7606-4
+ - adi,ad7606-6
+ - adi,ad7606-8
+ - adi,ad7607
+ - adi,ad7608
+ - adi,ad7609
+ - adi,ad7616
+ then:
+ patternProperties:
+ "^channel@[0-9a-f]+$":
+ properties:
+ adi,rfilter-ohms: false
+
- if:
properties:
compatible:
@@ -398,6 +426,7 @@ examples:
reg = <8>;
diff-channels = <8 8>;
bipolar;
+ adi,rfilter-ohms = <2048>;
};
};
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v5 5/5] iio: adc: ad7606: add gain calibration support
2025-05-19 10:13 [PATCH v5 0/5] iio: adc: add ad7606 calibration support Angelo Dureghello
` (3 preceding siblings ...)
2025-05-19 10:13 ` [PATCH v5 4/5] dt-bindings: iio: adc: adi,ad7606: add gain " Angelo Dureghello
@ 2025-05-19 10:13 ` Angelo Dureghello
2025-05-19 11:23 ` Andy Shevchenko
4 siblings, 1 reply; 7+ messages in thread
From: Angelo Dureghello @ 2025-05-19 10:13 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Lars-Peter Clausen, Michael Hennerich, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-iio, linux-kernel, Michael Hennerich, devicetree,
Angelo Dureghello
From: Angelo Dureghello <adureghello@baylibre.com>
Add gain calibration support, using resistor values set on devicetree,
values to be set accordingly with ADC external RFilter, as explained in
the ad7606c-16 datasheet, rev0, page 37.
Usage example in the fdt yaml documentation.
Tested-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
drivers/iio/adc/ad7606.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++++
drivers/iio/adc/ad7606.h | 3 +++
2 files changed, 64 insertions(+)
diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c
index bb0c89fc618874f4a5948d8e537716f87127bc92..19802bb7ec6624203b50589b6b76085c9f2f9628 100644
--- a/drivers/iio/adc/ad7606.c
+++ b/drivers/iio/adc/ad7606.c
@@ -33,6 +33,10 @@
#include "ad7606.h"
+#define AD7606_CALIB_GAIN_MIN 0
+#define AD7606_CALIB_GAIN_STEP 1024
+#define AD7606_CALIB_GAIN_MAX (63 * AD7606_CALIB_GAIN_STEP)
+
/*
* Scales are computed as 5000/32768 and 10000/32768 respectively,
* so that when applied to the raw values they provide mV values.
@@ -125,6 +129,7 @@ static int ad7609_chan_scale_setup(struct iio_dev *indio_dev,
struct iio_chan_spec *chan);
static int ad7616_sw_mode_setup(struct iio_dev *indio_dev);
static int ad7606b_sw_mode_setup(struct iio_dev *indio_dev);
+static int ad7606_chan_calib_gain_setup(struct iio_dev *indio_dev);
const struct ad7606_chip_info ad7605_4_info = {
.max_samplerate = 300 * KILO,
@@ -180,6 +185,7 @@ const struct ad7606_chip_info ad7606b_info = {
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_gain_setup_cb = ad7606_chan_calib_gain_setup,
.calib_offset_avail = ad7606_calib_offset_avail,
.calib_phase_avail = ad7606b_calib_phase_avail,
};
@@ -195,6 +201,7 @@ const struct ad7606_chip_info ad7606c_16_info = {
.scale_setup_cb = ad7606c_16bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_gain_setup_cb = ad7606_chan_calib_gain_setup,
.calib_offset_avail = ad7606_calib_offset_avail,
.calib_phase_avail = ad7606c_calib_phase_avail,
};
@@ -246,6 +253,7 @@ const struct ad7606_chip_info ad7606c_18_info = {
.scale_setup_cb = ad7606c_18bit_chan_scale_setup,
.sw_setup_cb = ad7606b_sw_mode_setup,
.offload_storagebits = 32,
+ .calib_gain_setup_cb = ad7606_chan_calib_gain_setup,
.calib_offset_avail = ad7606c_18bit_calib_offset_avail,
.calib_phase_avail = ad7606c_calib_phase_avail,
};
@@ -357,6 +365,52 @@ static int ad7606_get_chan_config(struct iio_dev *indio_dev, int ch,
return 0;
}
+static int ad7606_chan_calib_gain_setup(struct iio_dev *indio_dev)
+{
+ struct ad7606_state *st = iio_priv(indio_dev);
+ unsigned int num_channels = st->chip_info->num_adc_channels;
+ struct device *dev = st->dev;
+ int ret;
+
+ /*
+ * This function is called once, and parses all the channel nodes,
+ * so continuing on next channel node on errors, informing of them.
+ */
+ device_for_each_child_node_scoped(dev, child) {
+ u32 reg, r_gain;
+
+ ret = fwnode_property_read_u32(child, "reg", ®);
+ if (ret)
+ continue;
+
+ /* Chan reg is a 1-based index. */
+ if (reg < 1 || reg > num_channels) {
+ dev_warn(dev, "wrong ch number (ignoring): %d\n", reg);
+ continue;
+ }
+
+ ret = fwnode_property_read_u32(child, "adi,rfilter-ohms",
+ &r_gain);
+ if (ret)
+ /* Keep the default register value. */
+ continue;
+
+ if (r_gain > AD7606_CALIB_GAIN_MAX) {
+ dev_warn(dev, "wrong gain calibration value");
+ continue;
+ }
+
+ ret = st->bops->reg_write(st, AD7606_CALIB_GAIN(reg - 1),
+ DIV_ROUND_CLOSEST(r_gain, AD7606_CALIB_GAIN_STEP));
+ if (ret) {
+ dev_warn(dev, "error writing r_gain");
+ continue;
+ }
+ }
+
+ return 0;
+}
+
static int ad7606c_18bit_chan_scale_setup(struct iio_dev *indio_dev,
struct iio_chan_spec *chan)
{
@@ -1448,6 +1502,13 @@ static int ad7606_probe_channels(struct iio_dev *indio_dev)
if (slow_bus)
channels[i] = (struct iio_chan_spec)IIO_CHAN_SOFT_TIMESTAMP(i);
+ /* Setting up gain calibration for all channels. */
+ if (st->sw_mode_en && st->chip_info->calib_offset_avail) {
+ ret = st->chip_info->calib_gain_setup_cb(indio_dev);
+ if (ret)
+ return ret;
+ }
+
indio_dev->channels = channels;
return 0;
diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h
index f613583a7fa4095115b0b28e3f8e51cd32b93524..6313eea2bd0ccf97222a50dc26d8ec65042d0db7 100644
--- a/drivers/iio/adc/ad7606.h
+++ b/drivers/iio/adc/ad7606.h
@@ -50,6 +50,7 @@ struct ad7606_state;
typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev,
struct iio_chan_spec *chan);
typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
+typedef int (*ad7606_calib_gain_setup_cb_t)(struct iio_dev *indio_dev);
/**
* struct ad7606_chip_info - chip specific information
@@ -66,6 +67,7 @@ typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
* @init_delay_ms: required delay in milliseconds for initialization
* after a restart
* @offload_storagebits: storage bits used by the offload hw implementation
+ * @calib_gain_setup_cb: callback to setup of gain calibration
* @calib_offset_avail: pointer to offset calibration range/limits array
* @calib_phase_avail: pointer to phase calibration range/limits array
*/
@@ -81,6 +83,7 @@ struct ad7606_chip_info {
bool os_req_reset;
unsigned long init_delay_ms;
u8 offload_storagebits;
+ ad7606_calib_gain_setup_cb_t calib_gain_setup_cb;
const int *calib_offset_avail;
const int (*calib_phase_avail)[2];
};
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v5 5/5] iio: adc: ad7606: add gain calibration support
2025-05-19 10:13 ` [PATCH v5 5/5] iio: adc: ad7606: " Angelo Dureghello
@ 2025-05-19 11:23 ` Andy Shevchenko
0 siblings, 0 replies; 7+ messages in thread
From: Andy Shevchenko @ 2025-05-19 11:23 UTC (permalink / raw)
To: Angelo Dureghello
Cc: Jonathan Cameron, David Lechner, Nuno Sá, Lars-Peter Clausen,
Michael Hennerich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-iio, linux-kernel, devicetree
On Mon, May 19, 2025 at 12:13:42PM +0200, Angelo Dureghello wrote:
> From: Angelo Dureghello <adureghello@baylibre.com>
>
> Add gain calibration support, using resistor values set on devicetree,
> values to be set accordingly with ADC external RFilter, as explained in
> the ad7606c-16 datasheet, rev0, page 37.
>
> Usage example in the fdt yaml documentation.
...
> + device_for_each_child_node_scoped(dev, child) {
> + u32 reg, r_gain;
> +
> + ret = fwnode_property_read_u32(child, "reg", ®);
> + if (ret)
> + continue;
> +
> + /* Chan reg is a 1-based index. */
> + if (reg < 1 || reg > num_channels) {
> + dev_warn(dev, "wrong ch number (ignoring): %d\n", reg);
> + continue;
> + }
Like I said, we should leave the validation to the schema or do it correctly here.
Otherwise it's an inconsistency between DT schema validator and this check.
I.o.w. this check *allows* the b0rken DT to be handled and I think this is simply
wrong.
> + ret = fwnode_property_read_u32(child, "adi,rfilter-ohms",
> + &r_gain);
> + if (ret)
> + /* Keep the default register value. */
> + continue;
> +
> + if (r_gain > AD7606_CALIB_GAIN_MAX) {
> + dev_warn(dev, "wrong gain calibration value");
> + continue;
> + }
Same here.
> + ret = st->bops->reg_write(st, AD7606_CALIB_GAIN(reg - 1),
> + DIV_ROUND_CLOSEST(r_gain, AD7606_CALIB_GAIN_STEP));
> + if (ret) {
> + dev_warn(dev, "error writing r_gain");
> + continue;
Not sure about this, though.
> + }
> + }
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 7+ messages in thread