[PATCH 0/3] EDAC: Add three Intel CPUs for EDAC support

[PATCH 0/3] EDAC: Add three Intel CPUs for EDAC support

[Qiuxu Zhuo]

Add EDAC support for three Intel CPUs: 

  - Patch 1: Wildcat Lake SoCs with In-Band ECC.
  - Patch 2: Granite Rapids-D for micro-server and edge computing applications.
  - Patch 3: Raptor Lake HX series SoCs with Out-of-Band ECC.

This patch series is on top of RAS edac-drivers branch.

Lili Li (1):
  EDAC/igen6: Add Intel Wildcat Lake SoCs support

Qiuxu Zhuo (2):
  EDAC/i10nm: Add Intel Granite Rapids-D support
  EDAC/ie31200: Add Intel Raptor Lake-HX SoCs support

 drivers/edac/i10nm_base.c   | 12 +++++++++++-
 drivers/edac/ie31200_edac.c |  4 ++++
 drivers/edac/igen6_edac.c   | 15 +++++++++++++++
 3 files changed, 30 insertions(+), 1 deletion(-)


base-commit: 815703e2ecdf091a724c16671aadd8c55de24878
-- 
2.43.0

[PATCH 1/3] EDAC/i10nm: Add Intel Granite Rapids-D support

[Qiuxu Zhuo]

The Granite Rapids-D CPU model uses memory controller registers similar
to those of the Granite Rapids server CPU but with a different memory
controller MMIO base.

Add the Granite Rapids-D CPU model ID and use the new memory controller
MMIO base for EDAC support.

Tested-by: VikasX Chougule <vikasx.chougule@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/i10nm_base.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index a3fca2567752..c1e45c16f70e 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -62,6 +62,7 @@
 	((GET_BITFIELD(reg, 0, 10) << 12) + 0x140000)
 
 #define I10NM_GNR_IMC_MMIO_OFFSET	0x24c000
+#define I10NM_GNR_D_IMC_MMIO_OFFSET	0x206000
 #define I10NM_GNR_IMC_MMIO_SIZE		0x4000
 #define I10NM_HBM_IMC_MMIO_SIZE		0x9000
 #define I10NM_DDR_IMC_CH_CNT(reg)	GET_BITFIELD(reg, 21, 24)
@@ -687,6 +688,14 @@ static struct pci_dev *get_gnr_mdev(struct skx_dev *d, int logical_idx, int *phy
 	return NULL;
 }
 
+static u32 get_gnr_imc_mmio_offset(void)
+{
+	if (boot_cpu_data.x86_vfm == INTEL_GRANITERAPIDS_D)
+		return I10NM_GNR_D_IMC_MMIO_OFFSET;
+
+	return I10NM_GNR_IMC_MMIO_OFFSET;
+}
+
 /**
  * get_ddr_munit() - Get the resource of the i-th DDR memory controller.
  *
@@ -715,7 +724,7 @@ static struct pci_dev *get_ddr_munit(struct skx_dev *d, int i, u32 *offset, unsi
 			return NULL;
 
 		*offset = I10NM_GET_IMC_MMIO_OFFSET(reg) +
-			  I10NM_GNR_IMC_MMIO_OFFSET +
+			  get_gnr_imc_mmio_offset() +
 			  physical_idx * I10NM_GNR_IMC_MMIO_SIZE;
 		*size   = I10NM_GNR_IMC_MMIO_SIZE;
 
@@ -1030,6 +1039,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
 	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &spr_cfg),
 	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,  &spr_cfg),
 	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,  &gnr_cfg),
+	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,  &gnr_cfg),
 	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &gnr_cfg),
 	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,   &gnr_cfg),
 	X86_MATCH_VFM(INTEL_ATOM_DARKMONT_X,  &gnr_cfg),
-- 
2.43.0

[PATCH 2/3] EDAC/igen6: Add Intel Wildcat Lake SoCs support

[Qiuxu Zhuo]

From: Lili Li <lili.li@intel.com>

Intel Wildcat Lake is a mobile derivative of Panther Lake with one
memory controller. Wildcat Lake SoCs share the same IBECC registers
with Meteor Lake-P SoCs.

Add a compute die ID and a new configuration structure for Wildcat
Lake SoCs with In-Band ECC capability for EDAC support.

Signed-off-by: Lili Li <lili.li@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/igen6_edac.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 5ffe9579959f..2fc59f9eed69 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -275,6 +275,9 @@ static struct work_struct ecclog_work;
 #define DID_PTL_H_SKU2	0xb001
 #define DID_PTL_H_SKU3	0xb002
 
+/* Compute die IDs for Wildcat Lake with IBECC */
+#define DID_WCL_SKU1	0xfd00
+
 static int get_mchbar(struct pci_dev *pdev, u64 *mchbar)
 {
 	union  {
@@ -569,6 +572,17 @@ static struct res_config mtl_p_cfg = {
 	.err_addr_to_imc_addr	= adl_err_addr_to_imc_addr,
 };
 
+static struct res_config wcl_cfg = {
+	.machine_check		= true,
+	.num_imc		= 1,
+	.imc_base		= 0xd800,
+	.ibecc_base		= 0xd400,
+	.ibecc_error_log_offset	= 0x170,
+	.ibecc_available	= mtl_p_ibecc_available,
+	.err_addr_to_sys_addr	= adl_err_addr_to_sys_addr,
+	.err_addr_to_imc_addr	= adl_err_addr_to_imc_addr,
+};
+
 static struct pci_device_id igen6_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, DID_EHL_SKU5), (kernel_ulong_t)&ehl_cfg },
 	{ PCI_VDEVICE(INTEL, DID_EHL_SKU6), (kernel_ulong_t)&ehl_cfg },
@@ -622,6 +636,7 @@ static struct pci_device_id igen6_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU1), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU2), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU3), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_WCL_SKU1), (kernel_ulong_t)&wcl_cfg },
 	{ },
 };
 MODULE_DEVICE_TABLE(pci, igen6_pci_tbl);
-- 
2.43.0

[PATCH 3/3] EDAC/ie31200: Add Intel Raptor Lake-HX SoCs support

[Qiuxu Zhuo]

Intel Raptor Lake-HX SoC shares the same memory controller registers
as Raptor Lake-S SoC. Add a compute die ID for Raptor Lake-HX SoCs with
Out-of-Band ECC capability for EDAC support.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Tested-by: Laurens SEGHERS <laurens@rale.com>
---
 drivers/edac/ie31200_edac.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index d9533ca25635..5c1fa1c0d12e 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c
@@ -94,6 +94,9 @@
 #define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_5	0xa740 /* 8P+12E, e.g. i7-14700 */
 #define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_6	0xa704 /* 6P+8E,  e.g. i5-14600 */
 
+/* Raptor Lake-HX */
+#define PCI_DEVICE_ID_INTEL_IE31200_RPL_HX_1	0xa702 /* 8P+16E, e.g. i9-13950HX */
+
 /* Alder Lake-S */
 #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
 
@@ -756,6 +759,7 @@ static const struct pci_device_id ie31200_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_4), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_5), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_6), (kernel_ulong_t)&rpl_s_cfg},
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_HX_1), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_1), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_2), (kernel_ulong_t)&rpl_s_cfg},
-- 
2.43.0

Re: [PATCH 0/3] EDAC: Add three Intel CPUs for EDAC support

[Luck, Tony]

On Fri, Jul 04, 2025 at 11:16:06PM +0800, Qiuxu Zhuo wrote:
> Add EDAC support for three Intel CPUs: 
> 
>   - Patch 1: Wildcat Lake SoCs with In-Band ECC.
>   - Patch 2: Granite Rapids-D for micro-server and edge computing applications.
>   - Patch 3: Raptor Lake HX series SoCs with Out-of-Band ECC.
> 
> This patch series is on top of RAS edac-drivers branch.
> 
> Lili Li (1):
>   EDAC/igen6: Add Intel Wildcat Lake SoCs support
> 
> Qiuxu Zhuo (2):
>   EDAC/i10nm: Add Intel Granite Rapids-D support
>   EDAC/ie31200: Add Intel Raptor Lake-HX SoCs support
> 
>  drivers/edac/i10nm_base.c   | 12 +++++++++++-
>  drivers/edac/ie31200_edac.c |  4 ++++
>  drivers/edac/igen6_edac.c   | 15 +++++++++++++++
>  3 files changed, 30 insertions(+), 1 deletion(-)

Added all three to RAS tree, branch edac-drivers.

Thanks

-Tony

RE: [PATCH 0/3] EDAC: Add three Intel CPUs for EDAC support

[Zhuo, Qiuxu]

> From: Luck, Tony <tony.luck@intel.com>
> [...]
> Subject: Re: [PATCH 0/3] EDAC: Add three Intel CPUs for EDAC support
> 
> On Fri, Jul 04, 2025 at 11:16:06PM +0800, Qiuxu Zhuo wrote:
> > Add EDAC support for three Intel CPUs:
> >
> >   - Patch 1: Wildcat Lake SoCs with In-Band ECC.
> >   - Patch 2: Granite Rapids-D for micro-server and edge computing
> applications.
> >   - Patch 3: Raptor Lake HX series SoCs with Out-of-Band ECC.
> >
> > This patch series is on top of RAS edac-drivers branch.
> >
> > Lili Li (1):
> >   EDAC/igen6: Add Intel Wildcat Lake SoCs support
> >
> > Qiuxu Zhuo (2):
> >   EDAC/i10nm: Add Intel Granite Rapids-D support
> >   EDAC/ie31200: Add Intel Raptor Lake-HX SoCs support
> >
> >  drivers/edac/i10nm_base.c   | 12 +++++++++++-
> >  drivers/edac/ie31200_edac.c |  4 ++++
> >  drivers/edac/igen6_edac.c   | 15 +++++++++++++++
> >  3 files changed, 30 insertions(+), 1 deletion(-)
> 
> Added all three to RAS tree, branch edac-drivers.

Thanks Tony.