[PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Ilpo Järvinen]

According to Maciej W. Rozycki <macro@orcam.me.uk>, the
mips_pcibios_init() for malta adjusts root bus IO resource start
address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
lower bound leaves PIIX4 IO resources outside of the root bus resource
and assign_fixed_resource_on_bus() does not link the resources into the
resource tree.

Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
the arch specific pcibios_enable_resources() did not check if the
resources were assigned which diverges from what PCI core checks,
effectively hiding the PIIX4 IO resources were not properly within the
resource tree. After starting to use pcibios_enable_resources() from
PCI core, enabling PIIX4 fails:

ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22

MIPS PCI code already has support for enforcing lower bounds using
PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
window start address itself. Make malta PCI code too to use
PCIBIOS_MIN_IO.

Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---

v2:

- Remove if and always set PCIBIOS_MIN_IO (suggested by Maciej).
- Minor improvement to the changelog

 arch/mips/pci/pci-malta.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/mips/pci/pci-malta.c b/arch/mips/pci/pci-malta.c
index 6aefdf20ca05..2e35aeba45bc 100644
--- a/arch/mips/pci/pci-malta.c
+++ b/arch/mips/pci/pci-malta.c
@@ -230,8 +230,7 @@ void __init mips_pcibios_init(void)
 	}
 
 	/* PIIX4 ACPI starts at 0x1000 */
-	if (controller->io_resource->start < 0x00001000UL)
-		controller->io_resource->start = 0x00001000UL;
+	PCIBIOS_MIN_IO = 0x1000;
 
 	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
 	ioport_resource.end = controller->io_resource->end;

base-commit: 2f2c7254931f41b5736e3ba12aaa9ac1bbeeeb92
-- 
2.39.5

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Bjorn Helgaas]

On Fri, Oct 17, 2025 at 02:09:03PM +0300, Ilpo Järvinen wrote:
> According to Maciej W. Rozycki <macro@orcam.me.uk>, the
> mips_pcibios_init() for malta adjusts root bus IO resource start
> address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
> lower bound leaves PIIX4 IO resources outside of the root bus resource
> and assign_fixed_resource_on_bus() does not link the resources into the
> resource tree.
> 
> Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> the arch specific pcibios_enable_resources() did not check if the
> resources were assigned which diverges from what PCI core checks,
> effectively hiding the PIIX4 IO resources were not properly within the
> resource tree. After starting to use pcibios_enable_resources() from
> PCI core, enabling PIIX4 fails:
> 
> ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
> ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
> 
> MIPS PCI code already has support for enforcing lower bounds using
> PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
> window start address itself. Make malta PCI code too to use
> PCIBIOS_MIN_IO.
> 
> Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
> Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
> Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Since ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") came
through the PCI tree, I'd be happy to merge this as well, given your
ack, Thomas.  It would be ideal to have a tested-by from Guenter.

I provisionally put it on pci/for-linus to facilitate testing.  If it
doesn't solve the problem or you'd rather take it, Thomas, I'll be
glad to drop it.

> ---
> 
> v2:
> 
> - Remove if and always set PCIBIOS_MIN_IO (suggested by Maciej).
> - Minor improvement to the changelog
> 
>  arch/mips/pci/pci-malta.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/mips/pci/pci-malta.c b/arch/mips/pci/pci-malta.c
> index 6aefdf20ca05..2e35aeba45bc 100644
> --- a/arch/mips/pci/pci-malta.c
> +++ b/arch/mips/pci/pci-malta.c
> @@ -230,8 +230,7 @@ void __init mips_pcibios_init(void)
>  	}
>  
>  	/* PIIX4 ACPI starts at 0x1000 */
> -	if (controller->io_resource->start < 0x00001000UL)
> -		controller->io_resource->start = 0x00001000UL;
> +	PCIBIOS_MIN_IO = 0x1000;
>  
>  	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
>  	ioport_resource.end = controller->io_resource->end;
> 
> base-commit: 2f2c7254931f41b5736e3ba12aaa9ac1bbeeeb92
> -- 
> 2.39.5
> 

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Guenter Roeck]

On 10/17/25 15:12, Bjorn Helgaas wrote:
> On Fri, Oct 17, 2025 at 02:09:03PM +0300, Ilpo Järvinen wrote:
>> According to Maciej W. Rozycki <macro@orcam.me.uk>, the
>> mips_pcibios_init() for malta adjusts root bus IO resource start
>> address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
>> lower bound leaves PIIX4 IO resources outside of the root bus resource
>> and assign_fixed_resource_on_bus() does not link the resources into the
>> resource tree.
>>
>> Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
>> the arch specific pcibios_enable_resources() did not check if the
>> resources were assigned which diverges from what PCI core checks,
>> effectively hiding the PIIX4 IO resources were not properly within the
>> resource tree. After starting to use pcibios_enable_resources() from
>> PCI core, enabling PIIX4 fails:
>>
>> ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
>> ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
>>
>> MIPS PCI code already has support for enforcing lower bounds using
>> PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
>> window start address itself. Make malta PCI code too to use
>> PCIBIOS_MIN_IO.
>>
>> Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
>> Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
>> Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
>> Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
>> Reported-by: Guenter Roeck <linux@roeck-us.net>
>> Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
>> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> 
> Since ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") came
> through the PCI tree, I'd be happy to merge this as well, given your
> ack, Thomas.  It would be ideal to have a tested-by from Guenter.
> 

I'll run it through my testbed tonight.

Guenter

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Guenter Roeck]

On Fri, Oct 17, 2025 at 02:09:03PM +0300, Ilpo Järvinen wrote:
> According to Maciej W. Rozycki <macro@orcam.me.uk>, the
> mips_pcibios_init() for malta adjusts root bus IO resource start
> address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
> lower bound leaves PIIX4 IO resources outside of the root bus resource
> and assign_fixed_resource_on_bus() does not link the resources into the
> resource tree.
> 
> Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> the arch specific pcibios_enable_resources() did not check if the
> resources were assigned which diverges from what PCI core checks,
> effectively hiding the PIIX4 IO resources were not properly within the
> resource tree. After starting to use pcibios_enable_resources() from
> PCI core, enabling PIIX4 fails:
> 
> ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
> ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
> 
> MIPS PCI code already has support for enforcing lower bounds using
> PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
> window start address itself. Make malta PCI code too to use
> PCIBIOS_MIN_IO.
> 
> Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
> Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
> Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Tested-by: Guenter Roeck <linux@roeck-us.net>

Guenter

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Maciej W. Rozycki]

On Fri, 17 Oct 2025, Ilpo Järvinen wrote:

> According to Maciej W. Rozycki <macro@orcam.me.uk>, the
> mips_pcibios_init() for malta adjusts root bus IO resource start
> address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
> lower bound leaves PIIX4 IO resources outside of the root bus resource
> and assign_fixed_resource_on_bus() does not link the resources into the
> resource tree.

 As mentioned in the other reply resource assignments such as:

00000000-00ffffff : MSC PCI I/O
  00000000-0000001f : 0000:00:0a.2
  00000020-00000021 : pic1
  00000030-0000003f : 0000:00:0a.1
  00000040-0000005f : 0000:00:0b.0
  00000060-0000006f : i8042
  00000070-00000077 : rtc0
  000000a0-000000a1 : pic2

otherwise result, which -- unsurprisingly -- break things.

> Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> the arch specific pcibios_enable_resources() did not check if the
> resources were assigned which diverges from what PCI core checks,
> effectively hiding the PIIX4 IO resources were not properly within the
> resource tree. After starting to use pcibios_enable_resources() from
> PCI core, enabling PIIX4 fails:
> 
> ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
> ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
> 
> MIPS PCI code already has support for enforcing lower bounds using
> PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
> window start address itself. Make malta PCI code too to use
> PCIBIOS_MIN_IO.

 So this does bring the ATA interface back to life:

 ata_piix 0000:00:0a.1: assign IRQ: got 0
-ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
-ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
+scsi host0: ata_piix
+scsi host1: ata_piix
+ata1: PATA max UDMA/33 cmd 0x1f0 ctl 0x3f6 bmdma 0x1800 irq 14 lpm-pol 0
+ata2: PATA max UDMA/33 cmd 0x170 ctl 0x376 bmdma 0x1808 irq 15 lpm-pol 0
[...]
+ata2.00: CFA: ST625211CF, 3.04, max UDMA/33
+ata2.00: 4883760 sectors, multi 0: LBA
[...]
+scsi 1:0:0:0: Direct-Access     ATA      ST625211CF       3.04 PQ: 0 ANSI: 5
+sd 1:0:0:0: [sda] 4883760 512-byte logical blocks: (2.50 GB/2.33 GiB)
+sd 1:0:0:0: [sda] Write Protect is off
+sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00
+sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
+sd 1:0:0:0: [sda] Preferred minimum I/O size 512 bytes

and also brings PS/2 interfaces, which weren't there before for whatever 
reason given that they are not PCI devices:

+serio: i8042 KBD port at 0x60,0x64 irq 1
+serio: i8042 AUX port at 0x60,0x64 irq 12

though I guess hardly anyone has ever used these ports with the Malta (it 
does have actual connectors).

 However it also takes some resource reservations away:

-00000000-0000001f : dma1
-00000020-00000021 : pic1
-00000040-0000005f : timer
-00000060-0000006f : keyboard
-00000070-00000077 : rtc0
-00000080-0000008f : dma page reg
-000000a0-000000a1 : pic2
-000000c0-000000df : dma2
-00000170-00000177 : ata_piix
-000001f0-000001f7 : ata_piix
-000002f8-000002ff : serial
-00000376-00000376 : ata_piix
-00000378-0000037a : parport0
-0000037b-0000037f : parport0
-000003f2-000003f2 : floppy
-000003f4-000003f5 : floppy
-000003f6-000003f6 : ata_piix
-000003f7-000003f7 : floppy
-000003f8-000003ff : serial
-00001000-00ffffff : MSC PCI I/O
+00000000-00ffffff : MSC PCI I/O
+  00000020-00000021 : pic1
+  00000060-0000006f : i8042
+  00000070-00000077 : rtc0
+  000000a0-000000a1 : pic2
+  00000170-00000177 : 0000:00:0a.1
+    00000170-00000177 : ata_piix
+  000001f0-000001f7 : 0000:00:0a.1
+    000001f0-000001f7 : ata_piix
+  000002f8-000002ff : serial
+  00000376-00000376 : 0000:00:0a.1
+    00000376-00000376 : ata_piix
+  00000378-0000037a : parport0
+  0000037b-0000037f : parport0
+  000003f2-000003f2 : floppy
+  000003f4-000003f5 : floppy
+  000003f6-000003f6 : 0000:00:0a.1
+    000003f6-000003f6 : ata_piix
+  000003f7-000003f7 : floppy
+  000003f8-000003ff : serial
   00001000-0000103f : 0000:00:0a.3
   00001040-0000105f : 0000:00:0a.2
     00001040-0000105f : uhci_hcd

-- as you can see the PIT timer resource and ISA DMA registers (used by 
the SuperIO devices, such as the FDD) are now gone.  I'm concerned about 
it even though it seems to have no visible impact on system operation.

 All in all this change does fix a serious regression and therefore:

Tested-by: Maciej W. Rozycki <macro@orcam.me.uk>

however I think the missing resource reservations need to be investigated.

> Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")

 I don't think it's correct to refer this here; things worked just fine up 
to ae81aad5c2e1 even if via different means and backporting blindly could 
be dangerous.  It might be worth mentioning somewhere in the text though.

  Maciej

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Thomas Bogendoerfer]

On Fri, Oct 17, 2025 at 02:09:03PM +0300, Ilpo Järvinen wrote:
> According to Maciej W. Rozycki <macro@orcam.me.uk>, the
> mips_pcibios_init() for malta adjusts root bus IO resource start
> address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
> lower bound leaves PIIX4 IO resources outside of the root bus resource
> and assign_fixed_resource_on_bus() does not link the resources into the
> resource tree.
> 
> Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> the arch specific pcibios_enable_resources() did not check if the
> resources were assigned which diverges from what PCI core checks,
> effectively hiding the PIIX4 IO resources were not properly within the
> resource tree. After starting to use pcibios_enable_resources() from
> PCI core, enabling PIIX4 fails:
> 
> ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
> ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
> 
> MIPS PCI code already has support for enforcing lower bounds using
> PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
> window start address itself. Make malta PCI code too to use
> PCIBIOS_MIN_IO.
> 
> Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
> Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
> Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> ---
> 
> v2:
> 
> - Remove if and always set PCIBIOS_MIN_IO (suggested by Maciej).
> - Minor improvement to the changelog
> 
>  arch/mips/pci/pci-malta.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/mips/pci/pci-malta.c b/arch/mips/pci/pci-malta.c
> index 6aefdf20ca05..2e35aeba45bc 100644
> --- a/arch/mips/pci/pci-malta.c
> +++ b/arch/mips/pci/pci-malta.c
> @@ -230,8 +230,7 @@ void __init mips_pcibios_init(void)
>  	}
>  
>  	/* PIIX4 ACPI starts at 0x1000 */
> -	if (controller->io_resource->start < 0x00001000UL)
> -		controller->io_resource->start = 0x00001000UL;
> +	PCIBIOS_MIN_IO = 0x1000;
>  
>  	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
>  	ioport_resource.end = controller->io_resource->end;
> 
> base-commit: 2f2c7254931f41b5736e3ba12aaa9ac1bbeeeb92
> -- 
> 2.39.5

Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Bjorn Helgaas]

On Fri, Oct 17, 2025 at 05:12:04PM -0500, Bjorn Helgaas wrote:
> On Fri, Oct 17, 2025 at 02:09:03PM +0300, Ilpo Järvinen wrote:
> > According to Maciej W. Rozycki <macro@orcam.me.uk>, the
> > mips_pcibios_init() for malta adjusts root bus IO resource start
> > address to prevent interfering with PIIX4 I/O cycle decoding. Adjusting
> > lower bound leaves PIIX4 IO resources outside of the root bus resource
> > and assign_fixed_resource_on_bus() does not link the resources into the
> > resource tree.
> > 
> > Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> > the arch specific pcibios_enable_resources() did not check if the
> > resources were assigned which diverges from what PCI core checks,
> > effectively hiding the PIIX4 IO resources were not properly within the
> > resource tree. After starting to use pcibios_enable_resources() from
> > PCI core, enabling PIIX4 fails:
> > 
> > ata_piix 0000:00:0a.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
> > ata_piix 0000:00:0a.1: probe with driver ata_piix failed with error -22
> > 
> > MIPS PCI code already has support for enforcing lower bounds using
> > PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO
> > window start address itself. Make malta PCI code too to use
> > PCIBIOS_MIN_IO.
> > 
> > Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> > Fixes: aa0980b80908 ("Fixes for system controllers for Atlas/Malta core cards.")
> > Link: https://lore.kernel.org/linux-pci/9085ab12-1559-4462-9b18-f03dcb9a4088@roeck-us.net/
> > Link: https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2510132229120.39634@angie.orcam.me.uk/
> > Reported-by: Guenter Roeck <linux@roeck-us.net>
> > Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> 
> Since ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") came
> through the PCI tree, I'd be happy to merge this as well, given your
> ack, Thomas.  It would be ideal to have a tested-by from Guenter.
> 
> I provisionally put it on pci/for-linus to facilitate testing.  If it
> doesn't solve the problem or you'd rather take it, Thomas, I'll be
> glad to drop it.

Added:

  Tested-by: Guenter Roeck <linux@roeck-us.net>
  Tested-by: Maciej W. Rozycki <macro@orcam.me.uk>
  Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

and dropped the Fixes: aa0980b80908 ("Fixes for system controllers for
Atlas/Malta core cards.")

If the missing resource reservations (dma1, tiger, dma page reg)
mentioned by Maciej are an issue or can be fixed up, let me know and
we can amend this.

> > ---
> > 
> > v2:
> > 
> > - Remove if and always set PCIBIOS_MIN_IO (suggested by Maciej).
> > - Minor improvement to the changelog
> > 
> >  arch/mips/pci/pci-malta.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> > 
> > diff --git a/arch/mips/pci/pci-malta.c b/arch/mips/pci/pci-malta.c
> > index 6aefdf20ca05..2e35aeba45bc 100644
> > --- a/arch/mips/pci/pci-malta.c
> > +++ b/arch/mips/pci/pci-malta.c
> > @@ -230,8 +230,7 @@ void __init mips_pcibios_init(void)
> >  	}
> >  
> >  	/* PIIX4 ACPI starts at 0x1000 */
> > -	if (controller->io_resource->start < 0x00001000UL)
> > -		controller->io_resource->start = 0x00001000UL;
> > +	PCIBIOS_MIN_IO = 0x1000;
> >  
> >  	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
> >  	ioport_resource.end = controller->io_resource->end;
> > 
> > base-commit: 2f2c7254931f41b5736e3ba12aaa9ac1bbeeeb92
> > -- 
> > 2.39.5
> > 

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Maciej W. Rozycki]

On Mon, 20 Oct 2025, Bjorn Helgaas wrote:

> > Since ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") came
> > through the PCI tree, I'd be happy to merge this as well, given your
> > ack, Thomas.  It would be ideal to have a tested-by from Guenter.
> > 
> > I provisionally put it on pci/for-linus to facilitate testing.  If it
> > doesn't solve the problem or you'd rather take it, Thomas, I'll be
> > glad to drop it.
> 
> Added:
> 
>   Tested-by: Guenter Roeck <linux@roeck-us.net>
>   Tested-by: Maciej W. Rozycki <macro@orcam.me.uk>
>   Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> 
> and dropped the Fixes: aa0980b80908 ("Fixes for system controllers for
> Atlas/Malta core cards.")
> 
> If the missing resource reservations (dma1, tiger, dma page reg)
> mentioned by Maciej are an issue or can be fixed up, let me know and
> we can amend this.

 NB this comes from `plat_mem_setup' in arch/mips/mti-malta/malta-setup.c 
iterating over `standard_io_resources'.  ISTR now this being my original 
reason to come up with the approach taken with commit aa0980b80908 rather 
than using PCIBIOS_MIN_IO.  Since the ranges are now owned by the PCI host 
bridge, calls to `request_resource' referring `ioport_resource' fail.

 I'm not sure offhand how to get a hold on the right handle under the new 
arrangement in this platform code, but clearly it must be doable as x86 
gets it right (and conversely Alpha gets it totally wrong).

 Also I think we should reserve the PCI port I/O window in the MMIO space 
as well; something that I pondered back those 20 years ago already.  For 
the system I've used here that'd show up as:

10000000-1affffff : MSC PCI MEM
  10000000-100fffff : 0000:00:0b.0
  [...]
  10142080-1014209f : 0000:00:0b.0
1b000000-1bffffff : MSC PCI I/O
1e000000-1e3fffff : 1e000000.flash flash@1e000000

Most non-x86 PCI host bridges have one, but I haven't come across a Linux
platform that would report it.

  Maciej

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Ilpo Järvinen]

On Tue, 21 Oct 2025, Maciej W. Rozycki wrote:

> On Mon, 20 Oct 2025, Bjorn Helgaas wrote:
> 
> > > Since ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") came
> > > through the PCI tree, I'd be happy to merge this as well, given your
> > > ack, Thomas.  It would be ideal to have a tested-by from Guenter.
> > > 
> > > I provisionally put it on pci/for-linus to facilitate testing.  If it
> > > doesn't solve the problem or you'd rather take it, Thomas, I'll be
> > > glad to drop it.
> > 
> > Added:
> > 
> >   Tested-by: Guenter Roeck <linux@roeck-us.net>
> >   Tested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> >   Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> > 
> > and dropped the Fixes: aa0980b80908 ("Fixes for system controllers for
> > Atlas/Malta core cards.")
> > 
> > If the missing resource reservations (dma1, tiger, dma page reg)
> > mentioned by Maciej are an issue or can be fixed up, let me know and
> > we can amend this.
> 
>  NB this comes from `plat_mem_setup' in arch/mips/mti-malta/malta-setup.c 
> iterating over `standard_io_resources'.  ISTR now this being my original 
> reason to come up with the approach taken with commit aa0980b80908 rather 
> than using PCIBIOS_MIN_IO.  Since the ranges are now owned by the PCI host 
> bridge, calls to `request_resource' referring `ioport_resource' fail.

So this platform would actually need multiple root bus IO resources to 
cover PIIX4 range without capturing non-PCI ranges?

>  I'm not sure offhand how to get a hold on the right handle under the new 
> arrangement in this platform code, but clearly it must be doable as x86 
> gets it right (and conversely Alpha gets it totally wrong).
> 
>  Also I think we should reserve the PCI port I/O window in the MMIO space 
> as well; something that I pondered back those 20 years ago already.  For 
> the system I've used here that'd show up as:
> 
> 10000000-1affffff : MSC PCI MEM
>   10000000-100fffff : 0000:00:0b.0
>   [...]
>   10142080-1014209f : 0000:00:0b.0
> 1b000000-1bffffff : MSC PCI I/O
> 1e000000-1e3fffff : 1e000000.flash flash@1e000000
> 
> Most non-x86 PCI host bridges have one, but I haven't come across a Linux
> platform that would report it.
> 
>   Maciej
> 

-- 
 i.

Re: [PATCH v2 1/1] MIPS: Malta: Use pcibios_align_resource() to block io range

[Maciej W. Rozycki]

On Tue, 21 Oct 2025, Ilpo Järvinen wrote:

> > > If the missing resource reservations (dma1, tiger, dma page reg)
> > > mentioned by Maciej are an issue or can be fixed up, let me know and
> > > we can amend this.
> > 
> >  NB this comes from `plat_mem_setup' in arch/mips/mti-malta/malta-setup.c 
> > iterating over `standard_io_resources'.  ISTR now this being my original 
> > reason to come up with the approach taken with commit aa0980b80908 rather 
> > than using PCIBIOS_MIN_IO.  Since the ranges are now owned by the PCI host 
> > bridge, calls to `request_resource' referring `ioport_resource' fail.
> 
> So this platform would actually need multiple root bus IO resources to 
> cover PIIX4 range without capturing non-PCI ranges?

 I've got it covered now; will send patches shortly.  It was easier than I 
thought, phew!

  Maciej