From: Andrew Davis <afd@ti.com>
To: Judith Mendez <jm@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Hari Nagalla <hnagalla@ti.com>
Subject: Re: [PATCH v5 05/10] arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
Date: Mon, 10 Feb 2025 16:59:13 -0600 [thread overview]
Message-ID: <aacaa1fa-1be3-4b84-8764-bcfb63d4c8d8@ti.com> (raw)
In-Reply-To: <20250210221530.1234009-6-jm@ti.com>
On 2/10/25 4:15 PM, Judith Mendez wrote:
> From: Devarsh Thakkar <devarsht@ti.com>
>
> For each remote proc, reserve memory for IPC and bind the mailbox
> assignments. Two memory regions are reserved for each remote processor.
> The first region of 1MB of memory is used for Vring shared buffers
> and the second region is used as external memory to the remote processor
> for the resource table and for tracebuffer allocations.
>
> Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
Acked-by: Andrew Davis <afd@ti.com>
> Changes since v4:
> - Add "status = okay" for mailbox nodes at the board level, disabling of
> mailbox nodes in voltage domain .dtsi files will come in a separate
> series
> ---
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 96 +++++++++++++++++++++++--
> 1 file changed, 90 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> index a6f0d87a50d8a..ac67c51caa211 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> @@ -49,6 +49,42 @@ linux,cma {
> linux,cma-default;
> };
>
> + c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x99800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + c7x_0_memory_region: c7x-memory@99900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x99900000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b900000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9c800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9c900000 0x00 0x1e00000>;
> + no-map;
> + };
> +
> secure_tfa_ddr: tfa@9e780000 {
> reg = <0x00 0x9e780000 0x00 0x80000>;
> alignment = <0x1000>;
> @@ -60,12 +96,6 @@ secure_ddr: optee@9e800000 {
> alignment = <0x1000>;
> no-map;
> };
> -
> - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> - compatible = "shared-dma-pool";
> - reg = <0x00 0x9c900000 0x00 0x01e00000>;
> - no-map;
> - };
> };
>
> opp-table {
> @@ -737,3 +767,57 @@ dpi1_out: endpoint {
> };
> };
> };
> +
> +&mailbox0_cluster0 {
> + status = "okay";
> +
> + mbox_r5_0: mbox-r5-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&mailbox0_cluster1 {
> + status = "okay";
> +
> + mbox_c7x_0: mbox-c7x-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&mailbox0_cluster2 {
> + status = "okay";
> +
> + mbox_mcu_r5_0: mbox-mcu-r5-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&wkup_r5fss0 {
> + status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> +};
> +
> +&mcu_r5fss0 {
> + status = "okay";
> +};
> +
> +&mcu_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
> + memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> + <&mcu_r5fss0_core0_memory_region>;
> +};
> +
> +&c7x_0 {
> + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
> + memory-region = <&c7x_0_dma_memory_region>,
> + <&c7x_0_memory_region>;
> + status = "okay";
> +};
next prev parent reply other threads:[~2025-02-10 22:59 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 22:15 [PATCH v5 00/10] Add R5F and C7xv device nodes Judith Mendez
2025-02-10 22:15 ` [PATCH v5 01/10] arm64: dts: ti: k3-am62-wakeup: Add wakeup R5F node Judith Mendez
2025-02-10 22:58 ` Andrew Davis
2025-02-19 16:30 ` Beleswar Prasad Padhi
2025-02-20 16:34 ` Judith Mendez
2025-02-10 22:15 ` [PATCH v5 02/10] arm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node Judith Mendez
2025-02-10 22:58 ` Andrew Davis
2025-02-10 22:15 ` [PATCH v5 03/10] arm64: dts: ti: k3-am62a-wakeup: Add R5F device node Judith Mendez
2025-02-10 22:58 ` Andrew Davis
2025-02-10 22:15 ` [PATCH v5 04/10] arm64: dts: ti: k3-am62a-main: Add C7xv " Judith Mendez
2025-02-10 22:58 ` Andrew Davis
2025-02-10 22:15 ` [PATCH v5 05/10] arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors Judith Mendez
2025-02-10 22:59 ` Andrew Davis [this message]
2025-02-10 22:15 ` [PATCH v5 06/10] arm64: dts: ti: k3-am62p5-sk: " Judith Mendez
2025-02-18 16:38 ` Andrew Davis
2025-02-18 17:51 ` Judith Mendez
2025-02-27 12:05 ` Devarsh Thakkar
2025-03-07 1:35 ` Judith Mendez
2025-02-10 22:15 ` [PATCH v5 07/10] arm64: dts: ti: k3-am62x-sk-common: " Judith Mendez
2025-02-10 22:15 ` [PATCH v5 08/10] arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP Judith Mendez
2025-02-10 22:15 ` [PATCH v5 09/10] arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 " Judith Mendez
2025-02-10 22:15 ` [PATCH v5 10/10] arm64: dts: ti: k3-am64: Reserve timers used by MCU FW Judith Mendez
2025-03-07 22:25 ` [PATCH v5 00/10] Add R5F and C7xv device nodes Judith Mendez
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